[S] Change in coreboot[master]: soc/amd: Add AMDFW_CONTAINS_FIRST_BIOS_BLOCK config item

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68229 )

Change subject: soc/amd: Add AMDFW_CONTAINS_FIRST_BIOS_BLOCK config item
......................................................................

soc/amd: Add AMDFW_CONTAINS_FIRST_BIOS_BLOCK config item

Add a config item to identify the SoCs where the first BIOS block,
either bootblock and/or verstage, is part of amdfw*.rom. This will help
to identify whether the metadata hash anchor, which is part of the first
BIOS block, is embedded in amdfw.rom such that it can be added as the
first entry in coreboot.rom.

BUG=None
TEST=Build Skyrim, Guybrush, Dalboz BIOS images.

Change-Id: I00cab18233edde597ddf90f83e32731cca741e15
Signed-off-by: Karthikeyan Ramasubramanian 
---
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/common/block/psp/Kconfig
M src/soc/amd/mendocino/Kconfig
M src/soc/amd/picasso/Kconfig
4 files changed, 44 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/68229/1

diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 43c83bf..235a2ab 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -352,6 +352,12 @@
    string
    default "src/soc/amd/cezanne/fw.cfg"

+config AMDFW_CONTAINS_FIRST_BIOS_BLOCK
+	bool
+	default y
+	help
+	  Bootblock and/or Verstage is part of amdfw*.rom
+
 config PSP_DISABLE_POSTCODES
    bool "Disable PSP post codes"
    help
diff --git a/src/soc/amd/common/block/psp/Kconfig b/src/soc/amd/common/block/psp/Kconfig
index 84e0215..4c24ff1 100644
--- a/src/soc/amd/common/block/psp/Kconfig
+++ b/src/soc/amd/common/block/psp/Kconfig
@@ -48,3 +48,10 @@
      coreboot ROM is properly signed and can not be disabled once fused.
      Refer AMD PSB user guide doc# 56654, Revision# 1.00, this document is
      only available with NDA customers.
+
+config AMDFW_CONTAINS_FIRST_BIOS_BLOCK
+	bool "Is First BIOS block part of AMDFW"
+	default n
+	help
+	  Select this configuration when either bootblock and/or verstage is part
+	  of amdfw*.rom.
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig
index d7c5372..8a2f8dc 100644
--- a/src/soc/amd/mendocino/Kconfig
+++ b/src/soc/amd/mendocino/Kconfig
@@ -362,6 +362,12 @@
    help
      Specify the path/location of AMD PSP Firmware config file.

+config AMDFW_CONTAINS_FIRST_BIOS_BLOCK
+	bool
+	default y
+	help
+	  Bootblock and/or Verstage is part of amdfw*.rom
+
 config PSP_DISABLE_POSTCODES
    bool "Disable PSP post codes"
    help
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 30ca132..094ab85 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -398,6 +398,12 @@
    string
    default "src/soc/amd/picasso/fw.cfg"

+config AMDFW_CONTAINS_FIRST_BIOS_BLOCK
+	bool
+	default y
+	help
+	  Bootblock and/or Verstage is part of amdfw*.rom
+
 config PSP_LOAD_MP2_FW
    bool
    default n