[S] Change in coreboot[master]: soc/intel/cmn/gfx: Add missing CML-U IGD device IDs

[Michał Żygowski (Code Review)]

Michał Żygowski has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67975 )

Change subject: soc/intel/cmn/gfx: Add missing CML-U IGD device IDs
......................................................................

soc/intel/cmn/gfx: Add missing CML-U IGD device IDs

Intel Core i5-10210U can have the following IGD Device IDs
0x9B21/0x9B41/0x9BAC/0x9BCA/0x9BCC according to Intel ARK. Some of
these IDs were not present in coreboot source nor hooked to the
common graphics driver. Add the missing IDs so that the graphics
driver will probe on the mentioned processor and detect the
framebuffer.

TEST=Boot Protectli VP4650 with i5-10210U and see framebuffer is
detected when using FSP GOP and libgfxinit.

Signed-off-by: Michał Żygowski 
Change-Id: Iee720a272367aead31c8c8fa712bade1b6e53948
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67975
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/include/device/pci_ids.h
M src/soc/intel/cannonlake/bootblock/report_platform.c
M src/soc/intel/common/block/graphics/graphics.c
3 files changed, 29 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 434449c..3da7410 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3925,7 +3925,9 @@
 #define PCI_DID_INTEL_CML_GT1_ULT_3			0x9B2B
 #define PCI_DID_INTEL_CML_GT1_ULT_4			0x9B2C
 #define PCI_DID_INTEL_CML_GT2_ULT_5			0x9BAA
+#define PCI_DID_INTEL_CML_GT2_ULT_8			0x9BAC
 #define PCI_DID_INTEL_CML_GT2_ULT_6			0x9BCA
+#define PCI_DID_INTEL_CML_GT2_ULT_7			0x9BCC
 #define PCI_DID_INTEL_CML_GT2_ULT_3			0x9B4B
 #define PCI_DID_INTEL_CML_GT2_ULT_4			0x9B4C
 #define PCI_DID_INTEL_CML_GT1_ULX_1			0x9B20
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index c168431..fe36271 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -140,6 +140,8 @@
    { PCI_DID_INTEL_CML_GT2_ULT_4, "CometLake ULT GT2" },
    { PCI_DID_INTEL_CML_GT2_ULT_5, "CometLake ULT GT2" },
    { PCI_DID_INTEL_CML_GT2_ULT_6, "CometLake ULT GT2" },
+	{ PCI_DID_INTEL_CML_GT2_ULT_7, "CometLake ULT GT2" },
+	{ PCI_DID_INTEL_CML_GT2_ULT_8, "CometLake ULT GT2" },
    { PCI_DID_INTEL_CML_GT1_ULX_1, "CometLake ULX GT1" },
    { PCI_DID_INTEL_CML_GT2_ULX_1, "CometLake ULX GT2" },
    { PCI_DID_INTEL_CML_GT1_S_1, "CometLake S GT1" },
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index 30fc2c2..98d1981 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -247,6 +247,8 @@
    PCI_DID_INTEL_CML_GT1_ULT_4,
    PCI_DID_INTEL_CML_GT2_ULT_5,
    PCI_DID_INTEL_CML_GT2_ULT_6,
+	PCI_DID_INTEL_CML_GT2_ULT_7,
+	PCI_DID_INTEL_CML_GT2_ULT_8,
    PCI_DID_INTEL_CML_GT2_ULT_3,
    PCI_DID_INTEL_CML_GT2_ULT_4,
    PCI_DID_INTEL_CML_GT1_ULX_1,