Change in coreboot[master]: soc/intel/cannonlake: Report Whiskey Lake info

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/27756

Change subject: soc/intel/cannonlake: Report Whiskey Lake info
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soc/intel/cannonlake: Report Whiskey Lake info

According to #574725, report Whiskey Lake CPUID, MCH device ID and
graphics device ID in bootblock stage.

BUG=N/A
TEST=Build and boot up whiskey lake rvp platform and check serial log to
see proper CPU/MCH/GFX/PCH got recognized.

Change-Id: I3fbc190e0520989d2fd4a9b3294e84d67e49b2cf
Signed-off-by: Lijian Zhao 
---
M src/soc/intel/cannonlake/bootblock/report_platform.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/27756/1

diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index 9d967ce..5ba8e71 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -36,6 +36,7 @@
    { CPUID_CANNONLAKE_B0, "Cannonlake B0" },
    { CPUID_CANNONLAKE_C0, "Cannonlake C0" },
    { CPUID_CANNONLAKE_D0, "Cannonlake D0" },
+	{ CPUID_WHISKEYLAKE_W0, "Whiskeylake W0" },
 };

static struct {
@@ -44,6 +45,7 @@
 } mch_table[] = {
    { PCI_DEVICE_ID_INTEL_CNL_ID_U, "Cannonlake-U" },
    { PCI_DEVICE_ID_INTEL_CNL_ID_Y, "Cannonlake-Y" },
+	{ PCI_DEVICE_ID_INTEL_WHL_ID_W, "Whiskeylake" },
 };

static struct {
@@ -67,6 +69,7 @@
    { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2, "Cannonlake ULT GT1.5" },
    { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3, "Cannonlake ULT GT1" },
    { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, "Cannonlake ULT GT0.5" },
+	{ PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Cannonlake ULT GT1" },
 };

static uint8_t get_dev_revision(pci_devfn_t dev)