Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38402 )
Change subject: nb/intel/sandybridge: drop LyCx(r, x, y) macro ......................................................................
nb/intel/sandybridge: drop LyCx(r, x, y) macro
LyCx(r, x, y) was a duplicate of the CxLy(r, x, y) with different order of computation, so that the big refactoring doesn't change the output binary of a timeless build. Now this woraround can be dropped.
Tested on lenovo/x230: still boots
Change-Id: I251b4dd383f954b27f392190092e06a9a06668e2 Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/northbridge/intel/sandybridge/sandybridge.h 1 file changed, 5 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/38402/1
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index d2f76e0..f12feaa 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -131,10 +131,7 @@ #define Gz(r, z) ((r) + ((z) * 0x100)) #define Ly(r, y) ((r) + ((y) * 4)) #define Cx(r, x) ((r) + ((x) * 0x400)) - -/* FIXME: These two are equivalent, but had to be split for reproducibility reasons. */ #define CxLy(r, x, y) ((r) + ((x) * 0x400) + ((y) * 4)) -#define LyCx(r, x, y) ((r) + ((y) * 4) + ((x) * 0x400))
/* Register definitions */ #define GDCRCLKRANKSUSED_ch(ch) Gz(0x0c00, ch) /* Indicates which rank is populated */ @@ -196,11 +193,11 @@ #define IOSAV_By_BW_SERROR_C_ch(ch, y) CxLy(0x4140, ch, y) /* IOSAV Bytelane Bit-wise error */
/* IOSAV sub-sequence control registers */ -#define IOSAV_n_SP_CMD_ADDR_ch(ch, y) LyCx(0x4200, ch, y) /* Special command address. */ -#define IOSAV_n_ADDR_UPD_ch(ch, y) LyCx(0x4210, ch, y) /* Address update control */ -#define IOSAV_n_SP_CMD_CTL_ch(ch, y) LyCx(0x4220, ch, y) /* Control of command signals */ -#define IOSAV_n_SUBSEQ_CTL_ch(ch, y) LyCx(0x4230, ch, y) /* Sub-sequence controls */ -#define IOSAV_n_ADDRESS_LFSR_ch(ch, y) LyCx(0x4240, ch, y) /* 23-bit LFSR state value */ +#define IOSAV_n_SP_CMD_ADDR_ch(ch, y) CxLy(0x4200, ch, y) /* Special command address. */ +#define IOSAV_n_ADDR_UPD_ch(ch, y) CxLy(0x4210, ch, y) /* Address update control */ +#define IOSAV_n_SP_CMD_CTL_ch(ch, y) CxLy(0x4220, ch, y) /* Control of command signals */ +#define IOSAV_n_SUBSEQ_CTL_ch(ch, y) CxLy(0x4230, ch, y) /* Sub-sequence controls */ +#define IOSAV_n_ADDRESS_LFSR_ch(ch, y) CxLy(0x4240, ch, y) /* 23-bit LFSR state value */
#define PM_THML_STAT_ch(ch) Cx(0x4280, ch) /* Thermal status of each rank */ #define IOSAV_SEQ_CTL_ch(ch) Cx(0x4284, ch) /* IOSAV sequence level control */
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38402 )
Change subject: nb/intel/sandybridge: drop LyCx(r, x, y) macro ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38402 )
Change subject: nb/intel/sandybridge: drop LyCx(r, x, y) macro ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38402/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38402/1//COMMIT_MSG@11 PS1, Line 11: woraround workaround
Hello Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38402
to look at the new patch set (#2).
Change subject: nb/intel/sandybridge: drop LyCx(r, x, y) macro ......................................................................
nb/intel/sandybridge: drop LyCx(r, x, y) macro
LyCx(r, x, y) was a duplicate of the CxLy(r, x, y) with different order of computation, so that the big refactoring doesn't change the output binary of a timeless build. Now this workaround can be dropped.
Tested on lenovo/x230: still boots
Change-Id: I251b4dd383f954b27f392190092e06a9a06668e2 Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/northbridge/intel/sandybridge/sandybridge.h 1 file changed, 5 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/38402/2
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38402 )
Change subject: nb/intel/sandybridge: drop LyCx(r, x, y) macro ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38402/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38402/1//COMMIT_MSG@11 PS1, Line 11: woraround
workaround
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38402 )
Change subject: nb/intel/sandybridge: drop LyCx(r, x, y) macro ......................................................................
Patch Set 3: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38402 )
Change subject: nb/intel/sandybridge: drop LyCx(r, x, y) macro ......................................................................
nb/intel/sandybridge: drop LyCx(r, x, y) macro
LyCx(r, x, y) was a duplicate of the CxLy(r, x, y) with different order of computation, so that the big refactoring doesn't change the output binary of a timeless build. Now this workaround can be dropped.
Tested on lenovo/x230: still boots
Change-Id: I251b4dd383f954b27f392190092e06a9a06668e2 Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/38402 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/sandybridge.h 1 file changed, 5 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index d2f76e0..f12feaa 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -131,10 +131,7 @@ #define Gz(r, z) ((r) + ((z) * 0x100)) #define Ly(r, y) ((r) + ((y) * 4)) #define Cx(r, x) ((r) + ((x) * 0x400)) - -/* FIXME: These two are equivalent, but had to be split for reproducibility reasons. */ #define CxLy(r, x, y) ((r) + ((x) * 0x400) + ((y) * 4)) -#define LyCx(r, x, y) ((r) + ((y) * 4) + ((x) * 0x400))
/* Register definitions */ #define GDCRCLKRANKSUSED_ch(ch) Gz(0x0c00, ch) /* Indicates which rank is populated */ @@ -196,11 +193,11 @@ #define IOSAV_By_BW_SERROR_C_ch(ch, y) CxLy(0x4140, ch, y) /* IOSAV Bytelane Bit-wise error */
/* IOSAV sub-sequence control registers */ -#define IOSAV_n_SP_CMD_ADDR_ch(ch, y) LyCx(0x4200, ch, y) /* Special command address. */ -#define IOSAV_n_ADDR_UPD_ch(ch, y) LyCx(0x4210, ch, y) /* Address update control */ -#define IOSAV_n_SP_CMD_CTL_ch(ch, y) LyCx(0x4220, ch, y) /* Control of command signals */ -#define IOSAV_n_SUBSEQ_CTL_ch(ch, y) LyCx(0x4230, ch, y) /* Sub-sequence controls */ -#define IOSAV_n_ADDRESS_LFSR_ch(ch, y) LyCx(0x4240, ch, y) /* 23-bit LFSR state value */ +#define IOSAV_n_SP_CMD_ADDR_ch(ch, y) CxLy(0x4200, ch, y) /* Special command address. */ +#define IOSAV_n_ADDR_UPD_ch(ch, y) CxLy(0x4210, ch, y) /* Address update control */ +#define IOSAV_n_SP_CMD_CTL_ch(ch, y) CxLy(0x4220, ch, y) /* Control of command signals */ +#define IOSAV_n_SUBSEQ_CTL_ch(ch, y) CxLy(0x4230, ch, y) /* Sub-sequence controls */ +#define IOSAV_n_ADDRESS_LFSR_ch(ch, y) CxLy(0x4240, ch, y) /* 23-bit LFSR state value */
#define PM_THML_STAT_ch(ch) Cx(0x4280, ch) /* Thermal status of each rank */ #define IOSAV_SEQ_CTL_ch(ch) Cx(0x4284, ch) /* IOSAV sequence level control */
-
Angel Pons (Code Review) -
Felix Held (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)