Change in coreboot[master]: soc/intel/broadwell/pch: Drop P_LVLx support in FADT

[Angel Pons (Code Review)]

Attention is currently required from: Nico Huber, Arthur Heymans, Patrick Rudolph.
Hello Nico Huber, Arthur Heymans, Patrick Rudolph,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/55220

to review the following change.

Change subject: soc/intel/broadwell/pch: Drop P_LVLx support in FADT
......................................................................

soc/intel/broadwell/pch: Drop P_LVLx support in FADT

IO MWAIT redirection is not enabled, and C-states are reported using the
_CST ACPI object, which overrides the P_LVLx values.

Change-Id: I3f71ef99396b56dbd960c507133c06a8eae55778
Signed-off-by: Angel Pons 
---
M src/soc/intel/broadwell/pch/fadt.c
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/55220/1

diff --git a/src/soc/intel/broadwell/pch/fadt.c b/src/soc/intel/broadwell/pch/fadt.c
index 6ba6478..52254a0 100644
--- a/src/soc/intel/broadwell/pch/fadt.c
+++ b/src/soc/intel/broadwell/pch/fadt.c
@@ -29,8 +29,9 @@
    fadt->pm2_cnt_len = 1;
    fadt->pm_tmr_len = 4;
    fadt->gpe0_blk_len = 32;
-	fadt->p_lvl2_lat = 1;
-	fadt->p_lvl3_lat = 87;
+	/* P_LVLx not used */
+	fadt->p_lvl2_lat = 101;
+	fadt->p_lvl3_lat = 1001;
    fadt->duty_offset = 1;
    fadt->duty_width = 0;
    fadt->day_alrm = 0xd;
@@ -40,7 +41,6 @@

fadt->flags |= ACPI_FADT_WBINVD |
    	       ACPI_FADT_C1_SUPPORTED |
-		       ACPI_FADT_C2_MP_SUPPORTED |
    	       ACPI_FADT_SLEEP_BUTTON |
    	       ACPI_FADT_SEALED_CASE |
    	       ACPI_FADT_S4_RTC_WAKE |