Change in coreboot[master]: soc/intel/tigerlake: Update Kconfig

[Wonkyu Kim (Code Review)]

Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37426 )

Change subject: soc/intel/tigerlake: Update Kconfig
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Patch Set 13:

(4 comments)

https://review.coreboot.org/c/coreboot/+/37426/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/37426/2//COMMIT_MSG@16 
PS2, Line 16:   4. Update chip files to include tigerlake PCH DEVFNs
> Having a list in a commit message, indicates that the commit should be split up into separate commit […]

Done

https://review.coreboot.org/c/coreboot/+/37426/11//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/37426/11//COMMIT_MSG@11 
PS11, Line 11: I2C
> This is not updated.

Ack

https://review.coreboot.org/c/coreboot/+/37426/11//COMMIT_MSG@11 
PS11, Line 11: UART
> This is not updated.

Ack

https://review.coreboot.org/c/coreboot/+/37426/11//COMMIT_MSG@13 
PS11, Line 13: PCH baseclock
> Reference?

We'll provide external document if we can find.
We're trying to find out document.  PCH base clock which is used for UART is changed from 120MHz to 100MHz.
So, we needed to update M/N setting for 115200 baudrate.