Attention is currently required from: Benjamin Doron, Christian Walter, David Milosevic, Lean Sheng Tan, Maximilian Brune, Naresh Solanki.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79086?usp=email )
Change subject: mainboard/emulation/qemu-sbsa: Add qemu-sbsa board ......................................................................
Patch Set 1: Code-Review+1
(6 comments)
File Documentation/mainboard/emulation/qemu-sbsa.md:
https://review.coreboot.org/c/coreboot/+/79086/comment/db237b30_dbcdee3a : PS1, Line 6: <TF-A> Can building TF-A be added to the makefile? It can be a in a follow-up.
https://review.coreboot.org/c/coreboot/+/79086/comment/a7b14c10_bd6afea6 : PS1, Line 6: qemu-system-aarch64 -nographic -m 1024 -M sbsa-ref -pflash <TF-A> \ : -pflash ./build/coreboot.rom \ Add a 'qemu' make target so that it is as simple as running 'make qemu'. This can be in a follow-up if you prefer.
File src/mainboard/emulation/qemu-sbsa/Kconfig:
https://review.coreboot.org/c/coreboot/+/79086/comment/369af4e2_69338b87 : PS1, Line 5: BOARD_SPECIFIC_OPTIONS default to SEPARATE_ROMSTAGE false? Romstage does nothing but initializing cbmem.
File src/mainboard/emulation/qemu-sbsa/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/79086/comment/cdd43c5f_cbba8eb9 : PS1, Line 419: Device (RES0) : { : Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) // _HID: Hardware ID : Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings : { : QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, : 0x0000000000000000, // Granularity : SBSA_PCIE_ECAM_BASE, // Range Minimum : SBSA_PCIE_ECAM_LIMIT, // Range Maximum : 0x0000000000000000, // Translation Offset : SBSA_PCIE_ECAM_SIZE, // Length : ,, , AddressRangeMemory, TypeStatic) : }) : Method (_STA) { : Return (0xF) : } : } Drop this. It's in dsdt_top.asl now.
File src/mainboard/emulation/qemu-sbsa/flash.fmd:
https://review.coreboot.org/c/coreboot/+/79086/comment/ebdafba0_8be09215 : PS1, Line 17: @0x0 CONFIG_ROM_SIZE not needed to specify
https://review.coreboot.org/c/coreboot/+/79086/comment/f68e6f3b_98a2d907 : PS1, Line 20: @0x20000 can also be dropped.