Attention is currently required from: Alexander Couzens, Maciej Pijanowski, Michał Kopeć, Paul Menzel.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80609?usp=email )
Change subject: mb/lenovo: Add ThinkCentre M920q (Cannon Lake) ......................................................................
Patch Set 6:
(10 comments)
File src/mainboard/lenovo/m920q/Kconfig:
https://review.coreboot.org/c/coreboot/+/80609/comment/b747e165_e2e9c0ac : PS4, Line 30: hex
Avoid type redefinitions, remove.
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/263d4f8b_ce675667 : PS4, Line 33: config DIMM_SPD_SIZE : default 512 #DDR4
Remove, that's the default for Cannon Lake based SoCs.
Done
File src/mainboard/lenovo/m920q/acpi/ec.asl:
PS4:
Done
File src/mainboard/lenovo/m920q/acpi/mainboard.asl:
PS4:
Done
File src/mainboard/lenovo/m920q/board.fmd:
PS4:
Is that really needed? What's different from the one that is generated during the build process?
Done
File src/mainboard/lenovo/m920q/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/80609/comment/5a0cd3a3_657d6660 : PS4, Line 52: # SATA
Remove superfluous comment.
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/f2457cf7_ad7d21fe : PS4, Line 56: [1] = 0, : [2] = 0, : [3] = 0, : [4] = 0, : [5] = 0, : [6] = 0, : [7] = 0,
Remove, they are disabled. […]
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/687eac3f_4db3c6bc : PS4, Line 117: # eSPI controller
Remove superfluous comment.
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/0a2de6e8_c337175b : PS4, Line 118: device ref p2sb on end :
Remove, they are hidden by the FSP and marked as hidden in chipset devicetree.
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/c3a21e63_67f0f54c : PS4, Line 121: register "PchHdaDspEnable" = "0"
Remove, set to 0.
Done
-
Felix Singer (Code Review)