Change in coreboot[master]: soc/mediatek/mt8186: Add GPIO driving functions

[Rex-BC Chen (Code Review)]

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu.
Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/62471

to look at the new patch set (#3).

Change subject: soc/mediatek/mt8186: Add GPIO driving functions
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soc/mediatek/mt8186: Add GPIO driving functions

Add GPIO driving functions to adjust pin driving.

Value of drive strength is different from different SoCs, so we define
GPIO_DRV0 to GPIO_DRV7 which are corresponding to 2/4/6/8/10/12/14/16mA
in MT8186.

This implementation is according to chapter 5.1 in MT8186 Functional
Specification.

BUG=b:218775654, b:216462313, b:212375511
TEST=build pass

Signed-off-by: Guodong Liu 
Change-Id: I6d987f28be98b515fa5c542222bda08bea1d5118
---
M src/soc/mediatek/common/include/soc/gpio_common.h
M src/soc/mediatek/mt8186/gpio.c
M src/soc/mediatek/mt8186/include/soc/gpio.h
3 files changed, 519 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/62471/3