Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31594
Change subject: cpu/x86/smm: Add qemu's SMM-Revision Level ......................................................................
cpu/x86/smm: Add qemu's SMM-Revision Level
The SMI handler on qemu returned early, due to missing SMM-Revision Level support.
Add the ID qemu uses, which is AMD64 compatible for qemu-system-x86_64.
Fixes booting tianocore payload with SMM variable store on qemu.
Change-Id: I978b94150cfc49a39c2a0818eb14a649850e451d Signed-off-by: Patrick Rudolph siro@das-labor.org --- M src/cpu/x86/smm/smihandler.c 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/31594/1
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index b2fc8b6..8c65cbd 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -168,6 +168,7 @@ smm_save_state(smm_base, SMM_EM64T101_ARCH_OFFSET, node); break; + case 0x00020064: case 0x00030064: state_save.type = AMD64; state_save.amd64_state_save =
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31594 )
Change subject: cpu/x86/smm: Add qemu's SMM-Revision Level ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/#/c/31594/1/src/cpu/x86/smm/smihandler.c File src/cpu/x86/smm/smihandler.c:
https://review.coreboot.org/#/c/31594/1/src/cpu/x86/smm/smihandler.c@151 PS1, Line 151: switch (smm_revision) { We could also mask bits that don't interest us here. Actually only bits 0..15 state the revision (see SDM vol 3 "34.9 SMM REVISION IDENTIFIER").
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31594 )
Change subject: cpu/x86/smm: Add qemu's SMM-Revision Level ......................................................................
Patch Set 1: Code-Review+1
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31594 )
Change subject: cpu/x86/smm: Add qemu's SMM-Revision Level ......................................................................
cpu/x86/smm: Add qemu's SMM-Revision Level
The SMI handler on qemu returned early, due to missing SMM-Revision Level support.
Add the ID qemu uses, which is AMD64 compatible for qemu-system-x86_64.
Fixes booting tianocore payload with SMM variable store on qemu.
Change-Id: I978b94150cfc49a39c2a0818eb14a649850e451d Signed-off-by: Patrick Rudolph siro@das-labor.org Reviewed-on: https://review.coreboot.org/c/31594 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net --- M src/cpu/x86/smm/smihandler.c 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index b2fc8b6..8c65cbd 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -168,6 +168,7 @@ smm_save_state(smm_base, SMM_EM64T101_ARCH_OFFSET, node); break; + case 0x00020064: case 0x00030064: state_save.type = AMD64; state_save.amd64_state_save =