Change in coreboot[master]: soc/intel/tigerlake: Define soc_get_pcie_rp_type - coreboot-gerrit

3 Dec 2021


      Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59853 )
Change subject: soc/intel/tigerlake: Define soc_get_pcie_rp_type
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Patch Set 1: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59853/comment/31fa0bef_4ed37860 
PS1, Line 10: tigerlake
Nit: Tiger Lake
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic3f7d3f2fc12ae2b53604cd8f8b694a7674c3620
Gerrit-Change-Number: 59853
Gerrit-PatchSet: 1
Gerrit-Owner: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Paul Menzel paulepanter@mailbox.org
Gerrit-Reviewer: Subrata Banik subrata.banik@intel.com
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