Change in coreboot[master]: mb/(amd,google): Update SPI Kconfig settings based on devicetree

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Furquan Shaikh, Marshall Dawson, Felix Held.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56885 )

Change subject: mb/(amd,google): Update SPI Kconfig settings based on devicetree
......................................................................

Patch Set 5:

(2 comments)

File src/mainboard/amd/majolica/Kconfig:

https://review.coreboot.org/c/coreboot/+/56885/comment/4ca65044_db32bf94 
PS5, Line 61: 	default 0	# 66MHz
Nit: Add a blank line between 2 config items.

File src/mainboard/google/guybrush/Kconfig:

https://review.coreboot.org/c/coreboot/+/56885/comment/5186159b_ff21f836 
PS5, Line 110: config TPM_SPI_SPEED
             : 	default 0	# 66MHz
             :
> Can we remove this since we don't use the TPM SPI interface on guybrush/zork?

All 4 different SPI speeds are configured using a single register - each 4 bits. The AMD common fch block API requires all 4 speeds be passed for configuration. That API needs to be updated if this were to become an optional configuration.