[XS] Change in coreboot[master]: mb/google/nissa/var/yavilla: Adjust WLAN_PERST_L power sequence

[Tony Huang (Code Review)]

Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77117?usp=email )

Change subject: mb/google/nissa/var/yavilla: Adjust WLAN_PERST_L power sequence
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mb/google/nissa/var/yavilla: Adjust WLAN_PERST_L power sequence

With this change TPERST_HIGH could meet spec.

BUG=None
TEST=emerge coreboot
     EE measured power sequence meet spec
     boot to system and check wifi connection is fine

Change-Id: Ifb909a55b36f2366132c3e20021c4bde4bc87a05
Signed-off-by: Tony Huang 
---
M src/mainboard/google/brya/variants/yavilla/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/77117/1

diff --git a/src/mainboard/google/brya/variants/yavilla/gpio.c b/src/mainboard/google/brya/variants/yavilla/gpio.c
index fb7577f..d33e588 100644
--- a/src/mainboard/google/brya/variants/yavilla/gpio.c
+++ b/src/mainboard/google/brya/variants/yavilla/gpio.c
@@ -52,7 +52,7 @@
    /* D6  : WWAN_EN */
    PAD_CFG_GPO(GPP_D6, 0, DEEP),
    /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
-	PAD_CFG_GPO(GPP_H20, 0, DEEP),
+	PAD_CFG_GPO(GPP_H20, 1, DEEP),
    /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
    PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
    /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */