[XS] Change in coreboot[main]: soc/intel/xeon_sp/spr: Use official microcodes

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81637?usp=email )

Change subject: soc/intel/xeon_sp/spr: Use official microcodes
......................................................................

Patch Set 1: Code-Review+2

(1 comment)

Patchset:

PS1:
> The official microcode is the BKC uMR1 that has been tested on archercity CRB. […]

The configs/builder/config.intel.crb.ac still uses local ucode binary. To make the updated ucode in effect, I need to have below changes,

+#CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y

Rechecked the log, the problem is within LinuxBoot, which should be able to be debugged. We can have this patch merged first and then clarify archercity CRB env later.