Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41528 )
Change subject: soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value ......................................................................
soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value
This patch increases PRERAM_CBMEM_CONSOLE_SIZE to fix *** Pre-CBMEM romstage console overflowed, log truncated! *** issue.
TEST=Verified on Hatch TGL platform.
Change-Id: Iae66b6a1260a9290b35d804487b7a07242c5ebc2 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/jasperlake/Kconfig M src/soc/intel/tigerlake/Kconfig 2 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/41528/1
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 47766ed..bfefbf2 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -207,4 +207,8 @@ 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), 6:Enable (2-wire DCI OOB), 7:Manual + +config PRERAM_CBMEM_CONSOLE_SIZE + hex + default 0xe00 endif diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index a690acf..352e854 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -204,4 +204,8 @@ 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), 6:Enable (2-wire DCI OOB), 7:Manual + +config PRERAM_CBMEM_CONSOLE_SIZE + hex + default 0xe00 endif
Hello Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41528
to look at the new patch set (#2).
Change subject: soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value ......................................................................
soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value
This patch increases PRERAM_CBMEM_CONSOLE_SIZE to fix *** Pre-CBMEM romstage console overflowed, log truncated! *** issue.
TEST=Verified on TGL platform.
Change-Id: Iae66b6a1260a9290b35d804487b7a07242c5ebc2 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/jasperlake/Kconfig M src/soc/intel/tigerlake/Kconfig 2 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/41528/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41528 )
Change subject: soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value ......................................................................
Patch Set 2: Code-Review+2
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41528 )
Change subject: soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value ......................................................................
Patch Set 2: Code-Review+1
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41528 )
Change subject: soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value ......................................................................
Patch Set 2: Code-Review+2
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41528 )
Change subject: soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value ......................................................................
soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value
This patch increases PRERAM_CBMEM_CONSOLE_SIZE to fix *** Pre-CBMEM romstage console overflowed, log truncated! *** issue.
TEST=Verified on TGL platform.
Change-Id: Iae66b6a1260a9290b35d804487b7a07242c5ebc2 Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/41528 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Wonkyu Kim wonkyu.kim@intel.com --- M src/soc/intel/jasperlake/Kconfig M src/soc/intel/tigerlake/Kconfig 2 files changed, 8 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Wonkyu Kim: Looks good to me, approved
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 47766ed..bfefbf2 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -207,4 +207,8 @@ 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), 6:Enable (2-wire DCI OOB), 7:Manual + +config PRERAM_CBMEM_CONSOLE_SIZE + hex + default 0xe00 endif diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index a55b543..e0d29fb 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -205,4 +205,8 @@ 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), 6:Enable (2-wire DCI OOB), 7:Manual + +config PRERAM_CBMEM_CONSOLE_SIZE + hex + default 0xe00 endif
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41528 )
Change subject: soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value ......................................................................
Patch Set 3:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/3908 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/3907 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/3906 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/3905
Please note: This test is under development and might not be accurate at all!