Change in coreboot[master]: src/northbridge/amd/pi/00730F01: enable PARALLEL_MP

[Angel Pons (Code Review)]

Attention is currently required from: Michał Żygowski, Michał Kopeć, Arthur Heymans.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59808 )

Change subject: src/northbridge/amd/pi/00730F01: enable PARALLEL_MP
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Patch Set 4: Code-Review+1

(1 comment)

File src/northbridge/amd/pi/00730F01/northbridge.c:

https://review.coreboot.org/c/coreboot/+/59808/comment/9d2f4ed0_afd36032 
PS4, Line 900: /* The flash is now no longer cacheable. Reset to WP for performance. */
             : 	mtrr_use_temp_range(OPTIMAL_CACHE_ROM_BASE, OPTIMAL_CACHE_ROM_SIZE,
             : 			    MTRR_TYPE_WRPROT);
Any reason not to do this earlier, e.g. in `pre_mp_init()`? If so, why not do this in the `post_mp_init` hook of `struct mp_ops`?