Attention is currently required from: Tarun Tuli, Jérémy Compostella.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74205 )
Change subject: soc/intel/cmn/cse: Fix unnecessary End-Of-Post cases ......................................................................
Patch Set 3:
(1 comment)
File src/soc/intel/common/block/cse/cse_eop.c:
https://review.coreboot.org/c/coreboot/+/74205/comment/46e592ea_860f6f37 PS3, Line 295: do_send_end_of_post(true);
/* Don't send EOP if below conditions being met * 1. For a CSE-Lite SKU * 2. if the CSE is running RO FW * 3. The board is running vboot in recovery mode * The expectation is the CSE is in SOFT TEMP DISABLE state, hence, need to * skip sending EOP cmd to CSE */ static bool is_cse_eop_supported(void) { if (CONFIG(SOC_INTEL_CSE_LITE_SKU) && vboot_recovery_mode_enabled() && cse_is_hfs1_com_soft_temp_disable()) { printk(BIOS_INFO, "HECI: coreboot in recovery mode; found CSE in expected SOFT " "TEMP DISABLE state, skipping EOP\n"); return false; } return true; }
static void send_cse_eop_with_late_finalize(void *unused) { if (is_cse_eop_supported()) do_send_end_of_post(true); if (CONFIG(SOC_INTEL_CSE_SEND_EOP_LATE) || CONFIG(SOC_INTEL_CSE_SEND_EOP_ASYNC)) cse_late_finalize(); }
relanded the original CL with proposed changes integrated into it https://review.coreboot.org/c/coreboot/+/74214/2/src/soc/intel/common/block/...