build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27989 )
Change subject: minnowmax: allow both 1333 and 1066 MHz memory SKUs ......................................................................
Patch Set 3:
(8 comments)
https://review.coreboot.org/#/c/27989/3/src/mainboard/intel/minnowmax/romsta... File src/mainboard/intel/minnowmax/romstage.c:
https://review.coreboot.org/#/c/27989/3/src/mainboard/intel/minnowmax/romsta... PS3, Line 61: .DRAMType = 1, /* DRAM Type: 0=DDR3, 1=DDR3L, 2=DDR3U, 4=LPDDR2, 5=LPDDR3, 6=DDR4*/ line over 80 characters
https://review.coreboot.org/#/c/27989/3/src/mainboard/intel/minnowmax/romsta... PS3, Line 65: .DIMMDensity = 1, /* DRAM device data density: 0=1Gb, 1=2Gb, 2=4Gb, 3=8Gb */ line over 80 characters
https://review.coreboot.org/#/c/27989/3/src/mainboard/intel/minnowmax/romsta... PS3, Line 66: .DIMMBusWidth = 3, /* DIMM Bus Width: 0=8bit, 1=16bit, 2=32bit, 3=64bit */ line over 80 characters
https://review.coreboot.org/#/c/27989/3/src/mainboard/intel/minnowmax/romsta... PS3, Line 69: .DIMMtRPtRCD = 11, /* tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc. */ line over 80 characters
https://review.coreboot.org/#/c/27989/3/src/mainboard/intel/minnowmax/romsta... PS3, Line 80: .DRAMType = 1, /* DRAM Type: 0=DDR3, 1=DDR3L, 2=DDR3U, 4=LPDDR2, 5=LPDDR3, 6=DDR4*/ line over 80 characters
https://review.coreboot.org/#/c/27989/3/src/mainboard/intel/minnowmax/romsta... PS3, Line 84: .DIMMDensity = 1, /* DRAM device data density: 0=1Gb, 1=2Gb, 2=4Gb, 3=8Gb */ line over 80 characters
https://review.coreboot.org/#/c/27989/3/src/mainboard/intel/minnowmax/romsta... PS3, Line 85: .DIMMBusWidth = 3, /* DIMM Bus Width: 0=8bit, 1=16bit, 2=32bit, 3=64bit */ line over 80 characters
https://review.coreboot.org/#/c/27989/3/src/mainboard/intel/minnowmax/romsta... PS3, Line 88: .DIMMtRPtRCD = 9, /* tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc. */ line over 80 characters
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build bot (Jenkins) (Code Review)