Change in coreboot[master]: Revert "mb/google/zork: Increase RO section to 5MB"

[Raul Rangel (Code Review)]

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42049 )

Change subject: Revert "mb/google/zork: Increase RO section to 5MB"
......................................................................

Revert "mb/google/zork: Increase RO section to 5MB"

This reverts commit fddd101904188193197be10c8eae04e76386299b.

Reason for revert: With FSP compression and non serial FSP we now have enough space in RO.

Original change's description:
> mb/google/zork: Increase RO section to 5MB
>
> The current size is too small to fit all the depthcharge assets.
> Increasing it to 5MB gives us 648k of free space.
>
> $ cbfstool /build/zork/firmware/image-trembyle.serial.bin print -r COREBOOT
> FMAP REGION: COREBOOT
> Name                           Offset     Type           Size   Comp
> cbfs master header             0x0        cbfs header        32 none
> fallback/romstage              0x80       stage          524316 none
> fallback/ramstage              0x80100    stage           96592 none
> config                         0x97ac0    raw               843 none
> revision                       0x97e80    raw               680 none
> spd.bin                        0x98180    spd              8192 none
> etc/sdcard0                    0x9a1c0    raw                 8 none
> locales                        0x9a200    raw               141 LZMA (166 decompressed)
> (empty)                        0x9a300    null             3224 none
> fspm.bin                       0x9afc0    fsp            720896 none
> (empty)                        0x14b000   null             3992 none
> fsps.bin                       0x14bfc0   fsp            327680 none
> pci1002,15d8,c1.rom            0x19c000   optionrom       54272 none
> pci1002,15d8,c4.rom            0x1a9480   optionrom       54272 none
> fallback/dsdt.aml              0x1b6900   raw             12727 none
> locale_hi.bin                  0x1b9b00   raw             10441 LZMA (239928 decompressed)
> ...
> locale_ko.bin                  0x254f80   raw             11282 LZMA (231168 decompressed)
> fallback/payload               0x257c00   simple elf      95169 none
> (empty)                        0x26f000   null           245656 none
> apu/amdfw                      0x2aafc0   raw           1277440 none
> (empty)                        0x3e2e00   null           688472 none
> bootblock                      0x48af80   bootblock          64 none
>
> BUG=b:130028876
> BRANCH=none
> TEST=Built image with depthcharge and booted.
>
> Change-Id: I9cd2902404ef68cdbd4a9484d5cb1ee9cba3efd1
> Signed-off-by: Raul E Rangel 
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+...
> Reviewed-by: Martin Roth

BUG=b:130028876, b:150746858
BRANCH=none
TEST=emerge-zork coreboot-zork chromeos-bootimage and boot trembyle
localhost ~ # flashrom -p host -r /tmp/main.bin
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
Calibrating delay loop... OK.
coreboot table found at 0xcbe54000.
Reading flash... SUCCESS

localhost ~ # futility dump_fmap /tmp/main.bin | grep WP_RO -B 3
area:            22
area_offset:     0x00c00000
area_size:       0x00400000 (4194304)
area_name:       WP_RO

localhost ~ # flashrom -p host --wp-range 0xc00000 0x400000 --wp-enable
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
coreboot table found at 0xcbe54000.
SUCCESS

localhost ~ # flashrom -p host --wp-status
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
coreboot table found at 0xcbe54000.
WP: status: 0x0094
WP: status.srp0: 1
WP: status.srp1: 0
WP: write protect is enabled.
WP: write protect range: start=0x00c00000, len=0x00400000

Signed-off-by: Raul E Rangel 
Change-Id: I5df10ee8e855adfaaf4b2fac4c2c47037ec093b4
---
M src/mainboard/google/zork/chromeos.fmd
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/42049/1

diff --git a/src/mainboard/google/zork/chromeos.fmd b/src/mainboard/google/zork/chromeos.fmd
index 963d1ee..90cd2d7 100644
--- a/src/mainboard/google/zork/chromeos.fmd
+++ b/src/mainboard/google/zork/chromeos.fmd
@@ -23,15 +23,15 @@
    	RW_NVRAM(PRESERVE)@0x767000 0x5000
    	RW_UNUSED@0x76C000 0x14000
    	SMMSTORE(PRESERVE)@0x780000 0x20000
-		RW_LEGACY(CBFS)@0x7A0000 0x360000
-		WP_RO@0xB00000 0x500000 {
+		RW_LEGACY(CBFS)@0x7A0000 0x460000
+		WP_RO@0xC00000 0x400000 {
    		RO_VPD(PRESERVE)@0x0 0x4000
-			RO_SECTION@0x4000 0x4FC000 {
+			RO_SECTION@0x4000 0x3FC000 {
    			FMAP@0x0 0x800
    			RO_FRID@0x800 0x40
    			RO_FRID_PAD@0x840 0x7C0
    			GBB@0x1000 0x70000
-				COREBOOT(CBFS)@0x71000 0x48B000
+				COREBOOT(CBFS)@0x71000 0x38B000
    		}
    	}
    }

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42049 )

Change subject: Revert "mb/google/zork: Increase RO section to 5MB"
......................................................................

Patch Set 1: Code-Review+2

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42049 )

Change subject: Revert "mb/google/zork: Increase RO section to 5MB"
......................................................................

Revert "mb/google/zork: Increase RO section to 5MB"

This reverts commit fddd101904188193197be10c8eae04e76386299b.

Reason for revert: With FSP compression and non serial FSP we now have enough space in RO.

Original change's description:
> mb/google/zork: Increase RO section to 5MB
>
> The current size is too small to fit all the depthcharge assets.
> Increasing it to 5MB gives us 648k of free space.
>
> $ cbfstool /build/zork/firmware/image-trembyle.serial.bin print -r COREBOOT
> FMAP REGION: COREBOOT
> Name                           Offset     Type           Size   Comp
> cbfs master header             0x0        cbfs header        32 none
> fallback/romstage              0x80       stage          524316 none
> fallback/ramstage              0x80100    stage           96592 none
> config                         0x97ac0    raw               843 none
> revision                       0x97e80    raw               680 none
> spd.bin                        0x98180    spd              8192 none
> etc/sdcard0                    0x9a1c0    raw                 8 none
> locales                        0x9a200    raw               141 LZMA (166 decompressed)
> (empty)                        0x9a300    null             3224 none
> fspm.bin                       0x9afc0    fsp            720896 none
> (empty)                        0x14b000   null             3992 none
> fsps.bin                       0x14bfc0   fsp            327680 none
> pci1002,15d8,c1.rom            0x19c000   optionrom       54272 none
> pci1002,15d8,c4.rom            0x1a9480   optionrom       54272 none
> fallback/dsdt.aml              0x1b6900   raw             12727 none
> locale_hi.bin                  0x1b9b00   raw             10441 LZMA (239928 decompressed)
> ...
> locale_ko.bin                  0x254f80   raw             11282 LZMA (231168 decompressed)
> fallback/payload               0x257c00   simple elf      95169 none
> (empty)                        0x26f000   null           245656 none
> apu/amdfw                      0x2aafc0   raw           1277440 none
> (empty)                        0x3e2e00   null           688472 none
> bootblock                      0x48af80   bootblock          64 none
>
> BUG=b:130028876
> BRANCH=none
> TEST=Built image with depthcharge and booted.
>
> Change-Id: I9cd2902404ef68cdbd4a9484d5cb1ee9cba3efd1
> Signed-off-by: Raul E Rangel 
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+...
> Reviewed-by: Martin Roth

BUG=b:130028876, b:150746858
BRANCH=none
TEST=emerge-zork coreboot-zork chromeos-bootimage and boot trembyle
localhost ~ # flashrom -p host -r /tmp/main.bin
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
Calibrating delay loop... OK.
coreboot table found at 0xcbe54000.
Reading flash... SUCCESS

localhost ~ # futility dump_fmap /tmp/main.bin | grep WP_RO -B 3
area:            22
area_offset:     0x00c00000
area_size:       0x00400000 (4194304)
area_name:       WP_RO

localhost ~ # flashrom -p host --wp-range 0xc00000 0x400000 --wp-enable
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
coreboot table found at 0xcbe54000.
SUCCESS

localhost ~ # flashrom -p host --wp-status
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
flashrom v0.9.9  : 1e0291b4 : Apr 16 2020 06:13:41 UTC on Linux 5.4.39 (x86_64)
coreboot table found at 0xcbe54000.
WP: status: 0x0094
WP: status.srp0: 1
WP: status.srp1: 0
WP: write protect is enabled.
WP: write protect range: start=0x00c00000, len=0x00400000

Signed-off-by: Raul E Rangel 
Change-Id: I5df10ee8e855adfaaf4b2fac4c2c47037ec093b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42049
Tested-by: build bot (Jenkins) 
Reviewed-by: Aaron Durbin 
---
M src/mainboard/google/zork/chromeos.fmd
1 file changed, 4 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Aaron Durbin: Looks good to me, approved

diff --git a/src/mainboard/google/zork/chromeos.fmd b/src/mainboard/google/zork/chromeos.fmd
index 963d1ee..90cd2d7 100644
--- a/src/mainboard/google/zork/chromeos.fmd
+++ b/src/mainboard/google/zork/chromeos.fmd
@@ -23,15 +23,15 @@
    	RW_NVRAM(PRESERVE)@0x767000 0x5000
    	RW_UNUSED@0x76C000 0x14000
    	SMMSTORE(PRESERVE)@0x780000 0x20000
-		RW_LEGACY(CBFS)@0x7A0000 0x360000
-		WP_RO@0xB00000 0x500000 {
+		RW_LEGACY(CBFS)@0x7A0000 0x460000
+		WP_RO@0xC00000 0x400000 {
    		RO_VPD(PRESERVE)@0x0 0x4000
-			RO_SECTION@0x4000 0x4FC000 {
+			RO_SECTION@0x4000 0x3FC000 {
    			FMAP@0x0 0x800
    			RO_FRID@0x800 0x40
    			RO_FRID_PAD@0x840 0x7C0
    			GBB@0x1000 0x70000
-				COREBOOT(CBFS)@0x71000 0x48B000
+				COREBOOT(CBFS)@0x71000 0x38B000
    		}
    	}
    }

[9elements QA (Code Review)]

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42049 )

Change subject: Revert "mb/google/zork: Increase RO section to 5MB"
......................................................................

Patch Set 2:

Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4
Emulation targets:
"QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4901
"QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4900
"QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4899
"QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4898

Please note: This test is under development and might not be accurate at all!