Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Angel Pons. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56151 )
Change subject: cpu/x86/mtrr: Add check_var_mtrr_range_enabled() helper function ......................................................................
Patch Set 1:
(2 comments)
File src/cpu/x86/mtrr/earlymtrr.c:
https://review.coreboot.org/c/coreboot/+/56151/comment/f2f455c7_b620e728 PS1, Line 136: static bool get_var_mtrr_range(int index, uintptr_t *base_address, size_t *length) : { : bool ret = false; : uint32_t address_bits; : uint64_t address_mask; : const uint32_t msr_reg = MTRR_PHYS_BASE(index); : uint64_t mask; : union { : uint64_t u64; : msr_t s; : } msr_a; : union { : uint64_t u64; : msr_t s; : } msr_m; : : address_bits = cpu_phys_address_size(); : address_mask = (1ULL << address_bits) - 1; : : msr_a.s = rdmsr(msr_reg); : msr_m.s = rdmsr(msr_reg + 1); : if (msr_m.u64 & MTRR_PHYS_MASK_VALID) { : *base_address = (msr_a.u64 & 0xfffffffffffff000ULL) : & address_mask; : : mask = (msr_m.u64 & 0xfffffffffffff000ULL) & address_mask; : *length = (~mask & address_mask) + 1; : ret = true; : } : return ret; : } maybe use struct region?
https://review.coreboot.org/c/coreboot/+/56151/comment/f2a9b5f0_431473b8 PS1, Line 168: bool check_var_mtrr_range_enabled(uintptr_t base, size_t size) This function relies on the caller to align base and size of the address range you want to check. That's not a good API. I'd prefer a function that can check if a certain arbitrary range is cached a certain way: UC/RW/RO/WC... e.g.: checking if [0xff700000, 0xffffffff] is covered by RO caching type MTRR. You also don't want to make assumptions on the MTRR default caching type: read it out first.