Patch set updated for coreboot: ff45d61 intel: Make monotonic timer a first class citizen
David Hendricks (dhendrix@chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6135
-gerrit
commit ff45d613dacecb395658e92d3a58061e2687b39a Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Fri Jun 27 12:13:30 2014 +1000
intel: Make monotonic timer a first class citizen
The monotonic time now needs to be a first class citizen in Coreboot as it is a hard dependency of the drivers/spi flash command polling function.
Change-Id: I4e43d2680bf84bc525138f71c2b813b0f6be5265 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/cpu/intel/fsp_model_206ax/Kconfig | 1 + src/cpu/intel/haswell/Kconfig | 1 + src/cpu/intel/model_2065x/Kconfig | 1 + src/cpu/intel/model_206ax/Kconfig | 1 + src/mainboard/intel/baskingridge/Kconfig | 2 +- src/mainboard/intel/bayleybay_fsp/Kconfig | 1 + src/northbridge/intel/nehalem/Kconfig | 1 + 7 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index 0fb4437..043320c 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -39,6 +39,7 @@ config CPU_SPECIFIC_OPTIONS select SUPPORT_CPU_UCODE_IN_CBFS if HAVE_FSP_BIN select PARALLEL_CPU_INIT select TSC_SYNC_MFENCE + select LAPIC_MONOTONIC_TIMER
config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index fa02cba..9cda140 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -24,6 +24,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select PARALLEL_CPU_INIT select PARALLEL_MP + select LAPIC_MONOTONIC_TIMER
config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 3ef314d..8185d3a 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -18,6 +18,7 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_CPU_INIT #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE + select LAPIC_MONOTONIC_TIMER
config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index a679e00..afd155a 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -19,6 +19,7 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_CPU_INIT #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE + select LAPIC_MONOTONIC_TIMER
config BOOTBLOCK_CPU_INIT string diff --git a/src/mainboard/intel/baskingridge/Kconfig b/src/mainboard/intel/baskingridge/Kconfig index b52df97..acf4a75 100644 --- a/src/mainboard/intel/baskingridge/Kconfig +++ b/src/mainboard/intel/baskingridge/Kconfig @@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select HAVE_SMI_HANDLER select MAINBOARD_HAS_CHROMEOS - select LAPIC_MONOTONIC_TIMER + select MONOTONIC_TIMER_MSR
config MAINBOARD_DIR string diff --git a/src/mainboard/intel/bayleybay_fsp/Kconfig b/src/mainboard/intel/bayleybay_fsp/Kconfig index 772cc70..7272cbc 100644 --- a/src/mainboard/intel/bayleybay_fsp/Kconfig +++ b/src/mainboard/intel/bayleybay_fsp/Kconfig @@ -31,6 +31,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT select DEFAULT_CONSOLE_LOGLEVEL_7 if FSP_PACKAGE_DEFAULT + select TSC_MONOTONIC_TIMER
config MAINBOARD_DIR string diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index 1da2ef9..18aa0e3 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -25,6 +25,7 @@ config NORTHBRIDGE_INTEL_NEHALEM select DYNAMIC_CBMEM select VGA select INTEL_EDID + select TSC_MONOTONIC_TIMER
if NORTHBRIDGE_INTEL_NEHALEM
-
David Hendricks