Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/70163 )
Change subject: soc/intel/alderlake: skip external buses for D-states list ......................................................................
soc/intel/alderlake: skip external buses for D-states list
The devices in the list that was introduced in commit c66ea985776 ("soc/intel/alderlake: provide a list of D-states to enter LPM") are all internal. This CL skips the external buses (which caused the addition of packages to non-existant paths such as "_SB.PCI0.RP1.MCHC", and warnings from the kernel)
BUG=b:231582182 TEST=Built and tested on anahera by verifying SSDT contents
Change-Id: I3785b2b2af85d96e2e1296b6cfdefcd72080b5fe Signed-off-by: Eran Mitrani mitrani@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/70163 Reviewed-by: Tarun Tuli taruntuli@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subratabanik@google.com Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com --- M src/soc/intel/alderlake/acpi.c 1 file changed, 27 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Eric Lai: Looks good to me, approved Tarun Tuli: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c index c874067..d7405cc 100644 --- a/src/soc/intel/alderlake/acpi.c +++ b/src/soc/intel/alderlake/acpi.c @@ -251,6 +251,9 @@ return DEFAULT_CPU_D_STATE;
case DEVICE_PATH_PCI: + /* skip external buses*/ + if (dev->bus->secondary != 0) + return NONE; for (size_t i = 0; i < ARRAY_SIZE(min_pci_sleep_states); i++) if (min_pci_sleep_states[i].pci_dev == dev->path.pci.devfn) return min_pci_sleep_states[i].min_sleep_state;