Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32885
Change subject: [TEST]nb/intel/sandybridge/raminit: Only read 16 DQ_TX error bits ......................................................................
[TEST]nb/intel/sandybridge/raminit: Only read 16 DQ_TX error bits
Only the lowest 16bits are meaningful. Who knows what happens in the upper bits...
Change-Id: Ief711e6ed0232227dc5f0b6c0d7db1512e900ab7 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/32885/1
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 5347c5c..9186f2d 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -2388,7 +2388,7 @@
FOR_ALL_LANES { statistics[lane][edge] = - MCHBAR32(0x4340 + 0x400 * channel + lane * 4); + (u16)MCHBAR32(0x4340 + 0x400 * channel + lane * 4); } } FOR_ALL_LANES {
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32885 )
Change subject: [TEST]nb/intel/sandybridge/raminit: Only read 16 DQ_TX error bits ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/32885/1/src/northbridge/intel/sandybridge/ra... File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/#/c/32885/1/src/northbridge/intel/sandybridge/ra... PS1, Line 2391: (u16)MCHBAR32(0x4340 + 0x400 * channel + lane * 4); line over 80 characters
Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32885 )
Change subject: [TEST]nb/intel/sandybridge/raminit: Only read 16 DQ_TX error bits ......................................................................
Abandoned