Change in ...coreboot[master]: soc/intel/cannonlake: Add USB device names

[Duncan Laurie (Code Review)]

Duncan Laurie has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/29997 )

Change subject: soc/intel/cannonlake: Add USB device names
......................................................................

soc/intel/cannonlake: Add USB device names

Add the ACPI device names for the USB ports to match what
is in the DSDT so USB ports can be defined in the SSDT.

Change-Id: Ibb323bbd324811fa3178b0cba3d7f0a315169486
Signed-off-by: Duncan Laurie 
Reviewed-on: https://review.coreboot.org/c/29997
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
---
M src/soc/intel/cannonlake/chip.c
1 file changed, 37 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 17b173a..4604d80 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -35,6 +35,43 @@
    if (dev->path.type == DEVICE_PATH_DOMAIN)
    	return "PCI0";

+	if (dev->path.type == DEVICE_PATH_USB) {
+		switch (dev->path.usb.port_type) {
+		case 0:
+			/* Root Hub */
+			return "RHUB";
+		case 2:
+			/* USB2 ports */
+			switch (dev->path.usb.port_id) {
+			case 0: return "HS01";
+			case 1: return "HS02";
+			case 2: return "HS03";
+			case 3: return "HS04";
+			case 4: return "HS05";
+			case 5: return "HS06";
+			case 6: return "HS07";
+			case 7: return "HS08";
+			case 8: return "HS09";
+			case 9: return "HS10";
+			case 10: return "HS11";
+			case 11: return "HS12";
+			}
+			break;
+		case 3:
+			/* USB3 ports */
+			switch (dev->path.usb.port_id) {
+			case 0: return "SS01";
+			case 1: return "SS02";
+			case 2: return "SS03";
+			case 3: return "SS04";
+			case 4: return "SS05";
+			case 5: return "SS06";
+			}
+			break;
+		}
+		return NULL;
+	}
+
    if (dev->path.type != DEVICE_PATH_PCI)
    	return NULL;