Hello hsin-hsiung wang,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/45400
to review the following change.
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
soc/mediatek/mt8192: add pmic MT6315 driver
Add pmic MT6315 driver.
BUG=None TEST=boot asurada. BRANCH=None
Signed-off-by: Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com Change-Id: I6b47473ee5d56a197bd21d4ab9b539d9663b6636 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/include/soc/mt6315.h A src/soc/mediatek/mt8192/mt6315.c 4 files changed, 415 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/45400/1
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 0f54c10..9e3f884 100755 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -10,6 +10,7 @@ bootblock-y += ../common/uart.c bootblock-y += ../common/wdt.c bootblock-y += pmif.c pmif_clk.c pmif_spi.c pmif_spmi.c +bootblock-y += mt6315.c bootblock-y += mt6359p.c
verstage-y += flash_controller.c diff --git a/src/soc/mediatek/mt8192/bootblock.c b/src/soc/mediatek/mt8192/bootblock.c index d9cb684..7987b1c 100644 --- a/src/soc/mediatek/mt8192/bootblock.c +++ b/src/soc/mediatek/mt8192/bootblock.c @@ -2,6 +2,7 @@
#include <bootblock_common.h> #include <soc/mmu_operations.h> +#include <soc/mt6315.h> #include <soc/mt6359p.h> #include <soc/pll.h> #include <soc/pmif.h> @@ -14,4 +15,5 @@ mt_pll_init(); mtk_pmif_init(); mt6359p_init(); + mt6315_init(); } diff --git a/src/soc/mediatek/mt8192/include/soc/mt6315.h b/src/soc/mediatek/mt8192/include/soc/mt6315.h new file mode 100644 index 0000000..51b719f --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/mt6315.h @@ -0,0 +1,82 @@ +/* + * This file is part of the coreboot project. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MEDIATEK_MT6315_H__ +#define __SOC_MEDIATEK_MT6315_H__ + +#include <types.h> + +enum { + PMIC_HWCID_L = 0x0008, + PMIC_HWCID_H = 0x0009, + PMIC_SWCID_L = 0x000A, + PMIC_SWCID_H = 0x000B, +}; + +struct mt6315_setting { + unsigned short addr; + unsigned short val; + unsigned short mask; + unsigned char shift; +}; + +#define MT6315_SWCID_H_CODE 0x15 +#define MT6315_SWCID_L_E1_CODE 0x10 +#define MT6315_SWCID_L_E2_CODE 0x20 +#define MT6315_SWCID_L_E3_CODE 0x30 + +enum spmi_slave { + SPMI_SLAVE_0 = 0, + SPMI_SLAVE_1, + SPMI_SLAVE_2, + SPMI_SLAVE_3, + SPMI_SLAVE_4, + SPMI_SLAVE_5, + SPMI_SLAVE_6, + SPMI_SLAVE_7, + SPMI_SLAVE_8, + SPMI_SLAVE_9, + SPMI_SLAVE_10, + SPMI_SLAVE_11, + SPMI_SLAVE_12, + SPMI_SLAVE_13, + SPMI_SLAVE_14, + SPMI_SLAVE_15 +}; + +enum { + MT6315_CPU = SPMI_SLAVE_6, + MT6315_GPU = SPMI_SLAVE_7, + MT6315_MAX, +}; + +enum { + MT6315_BUCK_1 = 0, + MT6315_BUCK_2, + MT6315_BUCK_3, + MT6315_BUCK_4, + MT6315_BUCK_max, +}; + +enum { + MT6315_BUCK_TOP_ELR0 = 0x1449, + MT6315_BUCK_TOP_ELR3 = 0x144d, + MT6315_BUCK_VBUCK1_DBG0 = 0x1499, + MT6315_BUCK_VBUCK1_DBG3 = 0x1599, +}; + +void mt6315_init(void); +void mt6315_buck_set_voltage(u32 slvid, u32 buck_id, u32 buck_uV); +unsigned int mt6315_buck_get_voltage(u32 slvid, u32 buck_id); +#endif /* __SOC_MEDIATEK_MT6315_H__ */ diff --git a/src/soc/mediatek/mt8192/mt6315.c b/src/soc/mediatek/mt8192/mt6315.c new file mode 100644 index 0000000..5702bc4 --- /dev/null +++ b/src/soc/mediatek/mt8192/mt6315.c @@ -0,0 +1,330 @@ +/* + * This file is part of the coreboot project. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <assert.h> +#include <console/console.h> +#include <delay.h> +#include <soc/pmif.h> +#include <soc/mt6315.h> + +static struct pmif *pmif_arb = NULL; + +static struct mt6315_setting init_setting_A[] = { + /* disable magic key protection */ + {0x3A9, 0x63, 0xFF, 0}, + {0x3A8, 0x15, 0xFF, 0}, + {0x3A0, 0x9C, 0xFF, 0}, + {0x39F, 0xEA, 0xFF, 0}, + {0x993, 0x47, 0xFF, 0}, + {0x992, 0x29, 0xFF, 0}, + {0x1418, 0x55, 0xFF, 0}, + {0x1417, 0x43, 0xFF, 0}, + {0x3A2, 0x2A, 0xFF, 0}, + {0x3A1, 0x7C, 0xFF, 0}, + /* clear boot status */ + {0x12A, 0x3, 0xFF, 0}, + {0xD, 1, 0x1, 0}, + {0xD, 0, 0x1, 0}, + {0x1416, 0xF, 0xF, 0}, + /* init setting */ + {0x13, 0x2, 0x2, 0}, + {0x15, 0x1F, 0x1F, 0}, + {0x22, 0x12, 0x12, 0}, + {0x8A, 0x6, 0xF, 0}, + {0x10B, 0x3, 0x3, 0}, + {0x38B, 0x4, 0xFF, 0}, + {0xA07, 0x0, 0x1, 0}, + {0xA1A, 0x1F, 0x1F, 0}, + {0x1457, 0x0, 0xFF, 0}, + {0x997, 0x7, 0x7F, 0}, + {0x999, 0xF0, 0xF0, 0}, + {0x9A0, 0x1, 0x1F, 0}, + {0x9A1, 0x1, 0x1F, 0}, + {0x9A2, 0x0, 0x1F, 0}, + {0x9A3, 0x1, 0x1F, 0}, + {0x1440, 0x0, 0xA, 0}, + {0x1487, 0x58, 0xFF, 0}, + {0x148B, 0x1, 0x7F, 0}, + {0x148C, 0x2, 0x7F, 0}, + {0x1507, 0x58, 0xFF, 0}, + {0x150B, 0x1, 0x7F, 0}, + {0x150C, 0x2, 0x7F, 0}, + {0x1587, 0x58, 0xFF, 0}, + {0x158B, 0x1, 0x7F, 0}, + {0x158C, 0x4, 0x7F, 0}, + {0x1607, 0x58, 0xFF, 0}, + {0x160B, 0x1, 0x7F, 0}, + {0x160C, 0x2, 0x7F, 0}, + {0x1687, 0x22, 0x76, 0}, + {0x1688, 0xE, 0x2F, 0}, + {0x1689, 0xA1, 0xE1, 0}, + {0x168A, 0x79, 0x7F, 0}, + {0x168B, 0x12, 0x3F, 0}, + {0x168D, 0x0, 0xC, 0}, + {0x168E, 0xD7, 0xFF, 0}, + {0x168F, 0x81, 0xFF, 0}, + {0x1690, 0x13, 0x3F, 0}, + {0x1691, 0x22, 0x76, 0}, + {0x1692, 0xE, 0x2F, 0}, + {0x1693, 0xA1, 0xE1, 0}, + {0x1694, 0x79, 0x7F, 0}, + {0x1695, 0x12, 0x3F, 0}, + {0x1697, 0x0, 0xC, 0}, + {0x1698, 0xD7, 0xFF, 0}, + {0x1699, 0x81, 0xFF, 0}, + {0x169A, 0x13, 0x3F, 0}, + {0x169B, 0x20, 0x70, 0}, + {0x169C, 0xE, 0x2F, 0}, + {0x169D, 0x80, 0xC1, 0}, + {0x169E, 0xF8, 0xF8, 0}, + {0x169F, 0x12, 0x3F, 0}, + {0x16A1, 0x0, 0xC, 0}, + {0x16A2, 0xDB, 0xFF, 0}, + {0x16A3, 0xA1, 0xFF, 0}, + {0x16A4, 0x1, 0xF, 0}, + {0x16A5, 0x22, 0x76, 0}, + {0x16A6, 0xE, 0x2F, 0}, + {0x16A7, 0xA1, 0xE1, 0}, + {0x16A8, 0x79, 0xFF, 0}, + {0x16A9, 0x12, 0x3F, 0}, + {0x16AB, 0x0, 0xC, 0}, + {0x16AC, 0xD7, 0xFF, 0}, + {0x16AD, 0x81, 0xFF, 0}, + {0x16AE, 0x13, 0x3F, 0}, + /* enable magic key protection */ + {0x3A9, 0, 0xFF, 0}, + {0x3A8, 0, 0xFF, 0}, + {0x3A0, 0, 0xFF, 0}, + {0x39F, 0, 0xFF, 0}, + {0x993, 0, 0xFF, 0}, + {0x992, 0, 0xFF, 0}, + {0x1418, 0, 0xFF, 0}, + {0x1417, 0, 0xFF, 0}, + {0x3a2, 0, 0xFF, 0}, + {0x3a1, 0, 0xFF, 0}, +}; + +static struct mt6315_setting init_setting_B[] = { + /* disable magic key protection */ + {0x3A9, 0x63, 0xFF, 0}, + {0x3A8, 0x15, 0xFF, 0}, + {0x3A0, 0x9C, 0xFF, 0}, + {0x39F, 0xEA, 0xFF, 0}, + {0x993, 0x47, 0xFF, 0}, + {0x992, 0x29, 0xFF, 0}, + {0x1418, 0x55, 0xFF, 0}, + {0x1417, 0x43, 0xFF, 0}, + {0x3a2, 0x2A, 0xFF, 0}, + {0x3a1, 0x7C, 0xFF, 0}, + /* init setting */ + {0x13, 0x2, 0x2, 0}, + {0x15, 0x1F, 0x1F, 0}, + {0x22, 0x12, 0x12, 0}, + {0x8A, 0x6, 0xF, 0}, + {0x10B, 0x3, 0x3, 0}, + {0x38B, 0x4, 0xFF, 0}, + {0xA07, 0x0, 0x1, 0}, + {0xA1A, 0x1F, 0x1F, 0}, + {0x1457, 0x0, 0xFF, 0}, + {0x997, 0x2F, 0x7F, 0}, + {0x999, 0xF0, 0xF0, 0}, + {0x9A0, 0x0, 0x1F, 0}, + {0x9A1, 0x0, 0x1F, 0}, + {0x9A2, 0xB, 0x1F, 0}, + {0x9A3, 0x0, 0x1F, 0}, + {0x1440, 0x0, 0xA, 0}, + {0x1487, 0x58, 0xFF, 0}, + {0x148B, 0x1, 0x7F, 0}, + {0x148C, 0x4, 0x7F, 0}, + {0x1507, 0x58, 0xFF, 0}, + {0x150B, 0x1, 0x7F, 0}, + {0x150C, 0x4, 0x7F, 0}, + {0x1587, 0x58, 0xFF, 0}, + {0x158B, 0x1, 0x7F, 0}, + {0x158C, 0x4, 0x7F, 0}, + {0x1607, 0x58, 0xFF, 0}, + {0x160B, 0x1, 0x7F, 0}, + {0x160C, 0x4, 0x7F, 0}, + {0x1687, 0x22, 0x76, 0}, + {0x1688, 0xE, 0x2F, 0}, + {0x1689, 0xA1, 0xE1, 0}, + {0x168A, 0x79, 0x7F, 0}, + {0x168B, 0x12, 0x3F, 0}, + {0x168D, 0x0, 0xC, 0}, + {0x168E, 0xD7, 0xFF, 0}, + {0x168F, 0x81, 0xFF, 0}, + {0x1690, 0x13, 0x3F, 0}, + {0x1691, 0x22, 0x76, 0}, + {0x1692, 0xE, 0x2F, 0}, + {0x1693, 0xA1, 0xE1, 0}, + {0x1694, 0x79, 0x7F, 0}, + {0x1695, 0x12, 0x3F, 0}, + {0x1697, 0x0, 0xC, 0}, + {0x1698, 0xD7, 0xFF, 0}, + {0x1699, 0x81, 0xFF, 0}, + {0x169A, 0x13, 0x3F, 0}, + {0x169B, 0x22, 0x76, 0}, + {0x169C, 0xE, 0x2F, 0}, + {0x169D, 0xA1, 0xE1, 0}, + {0x169E, 0x79, 0x7F, 0}, + {0x169F, 0x12, 0x3F, 0}, + {0x16A1, 0x0, 0xC, 0}, + {0x16A2, 0xD7, 0xFF, 0}, + {0x16A3, 0x81, 0xFF, 0}, + {0x16A4, 0x13, 0x3F, 0}, + {0x16A5, 0x22, 0x76, 0}, + {0x16A6, 0xE, 0x2F, 0}, + {0x16A7, 0xA1, 0xE1, 0}, + {0x16A8, 0x79, 0xFF, 0}, + {0x16A9, 0x12, 0x3F, 0}, + {0x16AB, 0x0, 0xC, 0}, + {0x16AC, 0xD7, 0xFF, 0}, + {0x16AD, 0x81, 0xFF, 0}, + {0x16AE, 0x13, 0x3F, 0}, + /* Don't remove this! it's MT6315 for GPU only to disable VBUCK3 */ + {0x1440, 0x0, 0x4, 0}, + /* enable magic key protection */ + {0x3A9, 0, 0xFF, 0}, + {0x3A8, 0, 0xFF, 0}, + {0x3A0, 0, 0xFF, 0}, + {0x39F, 0, 0xFF, 0}, + {0x993, 0, 0xFF, 0}, + {0x992, 0, 0xFF, 0}, + {0x1418, 0, 0xFF, 0}, + {0x1417, 0, 0xFF, 0}, + {0x3a2, 0, 0xFF, 0}, + {0x3a1, 0, 0xFF, 0}, +}; + +static int mt6315_read(u32 slvid, u32 addr, u32 *rdata) +{ + if (pmif_arb == NULL) + pmif_arb = get_pmif_controller(PMIF_SPMI, 0); + + return pmif_arb->read_cmd(pmif_arb, slvid, addr, rdata); +} + +static int mt6315_write(u32 slvid, u32 addr, u32 wdata) +{ + if (pmif_arb == NULL) + pmif_arb = get_pmif_controller(PMIF_SPMI, 0); + + return pmif_arb->write_cmd(pmif_arb, slvid, addr, wdata); +} + +static unsigned int mt6315_read_field(u32 slvid, u32 reg, u32 mask, u32 shift) +{ + u32 rdata; + + mt6315_read(slvid, reg, &rdata); + rdata &= (mask << shift); + rdata = (rdata >> shift); + + return rdata; +} + +static void mt6315_write_field(u32 slvid, u32 reg, u32 val, u32 mask, u32 shift) +{ + u32 old, new; + + mt6315_read(slvid, reg, &old); + new = old & ~(mask << shift); + new |= (val << shift); + mt6315_write(slvid, reg, new); +} + +static void mt6315_wdt_enable(u32 slvid) +{ + mt6315_write_field(slvid, 0x3A9, 0x63, 0xFF, 0); + mt6315_write_field(slvid, 0x3A8, 0x15, 0xFF, 0); + mt6315_write_field(slvid, 0x127, 0x2, 0xFF, 0); + mt6315_write_field(slvid, 0x127, 0x1, 0xFF, 0); + mt6315_write_field(slvid, 0x127, 0x8, 0xFF, 0); + udelay(50); + mt6315_write_field(slvid, 0x128, 0x8, 0xFF, 0); + mt6315_write_field(slvid, 0x3A9, 0, 0xFF, 0); + mt6315_write_field(slvid, 0x3A8, 0, 0xFF, 0); +} + +static void mt6315_init_setting(void) +{ + for (size_t i = 0; i < ARRAY_SIZE(init_setting_A); i++) + mt6315_write_field(MT6315_CPU, + init_setting_A[i].addr, init_setting_A[i].val, + init_setting_A[i].mask, init_setting_A[i].shift); + + for (size_t i = 0; i < ARRAY_SIZE(init_setting_B); i++) + mt6315_write_field(MT6315_GPU, + init_setting_B[i].addr, init_setting_B[i].val, + init_setting_B[i].mask, init_setting_B[i].shift); +} + +void mt6315_buck_set_voltage(u32 slvid, u32 buck_id, u32 buck_uV) +{ + unsigned int vol_reg, vol_val; + + switch (buck_id) { + case MT6315_BUCK_1: + vol_reg = MT6315_BUCK_TOP_ELR0; + break; + + case MT6315_BUCK_3: + vol_reg = MT6315_BUCK_TOP_ELR3; + break; + + default: + assert(0); + return; + }; + + vol_val = buck_uV / 6250; + mt6315_write_field(slvid, vol_reg, vol_val, 0xFF, 0); + + return; +} + +unsigned int mt6315_buck_get_voltage(u32 slvid, u32 buck_id) +{ + u32 vol_reg, vol; + + switch (buck_id) { + case MT6315_BUCK_1: + vol_reg = MT6315_BUCK_VBUCK1_DBG0; + break; + + case MT6315_BUCK_3: + vol_reg = MT6315_BUCK_VBUCK1_DBG3; + break; + + default: + assert(0); + return 0; + }; + + vol = mt6315_read_field(slvid, vol_reg, 0xFF, 0); + return vol * 6250; +} + +void mt6315_init(void) +{ + if (pmif_arb == NULL) + pmif_arb = get_pmif_controller(PMIF_SPMI, 0); + + if (pmif_arb->is_pmif_init_done(pmif_arb)) + die("ERROR - Failed to initialize pmif spmi!"); + + mt6315_wdt_enable(MT6315_CPU); + mt6315_wdt_enable(MT6315_GPU); + mt6315_init_setting(); +}
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 295: } void function return statements are not generally useful
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 1:
(4 comments)
this seems largely duped with 6359P driver. Can we refactor them to share most of the code?
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/mt6315.h:
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/inc... PS1, Line 1: /* : * This file is part of the coreboot project. : * : * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details. : */ SPDX
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/inc... PS1, Line 21: just one space.
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/inc... PS1, Line 34: #define MT6315_SWCID_H_CODE 0x15 : #define MT6315_SWCID_L_E1_CODE 0x10 : #define MT6315_SWCID_L_E2_CODE 0x20 : #define MT6315_SWCID_L_E3_CODE 0x30 enum
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 17: #include <delay.h> SPDX
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 1:
(11 comments)
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 23: A lowercase 'a'
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 23: static static const
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 118: B b
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 118: static static const
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 212: if (pmif_arb == NULL) : pmif_arb = get_pmif_controller(PMIF_SPMI, 0); Similar to MT6359P, I think there's no need for this.
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 262: size_t int
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 267: size_t int
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 273: buck_uV buck_uv
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 287: assert(0); die()?
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 311: assert(0); die()?
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 324: pmif_arb What if this is NULL?
Yidi Lin has uploaded a new patch set (#2) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
soc/mediatek/mt8192: add pmic MT6315 driver
Add pmic MT6315 driver.
BUG=None TEST=boot asurada. BRANCH=None
Signed-off-by: Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com Change-Id: I6b47473ee5d56a197bd21d4ab9b539d9663b6636 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/include/soc/mt6315.h A src/soc/mediatek/mt8192/mt6315.c 4 files changed, 365 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/45400/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... PS2, Line 280: } void function return statements are not generally useful
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 2:
(16 comments)
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/mt6315.h:
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/inc... PS1, Line 1: /* : * This file is part of the coreboot project. : * : * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details. : */
SPDX
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/inc... PS1, Line 21:
just one space.
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/inc... PS1, Line 34: #define MT6315_SWCID_H_CODE 0x15 : #define MT6315_SWCID_L_E1_CODE 0x10 : #define MT6315_SWCID_L_E2_CODE 0x20 : #define MT6315_SWCID_L_E3_CODE 0x30
enum
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 17: #include <delay.h>
SPDX
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 23: A
lowercase 'a'
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 23: static
static const
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 118: B
b
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 118: static
static const
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 262: size_t
int
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 267: size_t
int
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 273: buck_uV
buck_uv
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 287: assert(0);
die()?
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 311: assert(0);
die()?
Done
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... PS2, Line 11: CPU lowercase 'cpu'
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... PS2, Line 106: GPU lowercase 'gpu'
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... PS2, Line 279: return; No need for 'return'.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45400/3/src/soc/mediatek/mt8192/mt6... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/3/src/soc/mediatek/mt8192/mt6... PS3, Line 280: } void function return statements are not generally useful
Yidi Lin has uploaded a new patch set (#4) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
soc/mediatek/mt8192: add pmic MT6315 driver
Add pmic MT6315 driver.
BUG=None TEST=boot asurada. BRANCH=None
Signed-off-by: Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com Change-Id: I6b47473ee5d56a197bd21d4ab9b539d9663b6636 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/include/soc/mt6315.h A src/soc/mediatek/mt8192/mt6315.c 4 files changed, 349 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/45400/4
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45400/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45400/7//COMMIT_MSG@9 PS7, Line 9: Add pmic MT6315 driver. Please elaborate, what the device is, and what the name and revision of the datasheet is.
Yidi Lin has uploaded a new patch set (#18) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
soc/mediatek/mt8192: add pmic MT6315 driver
Add pmic MT6315 driver.
BUG=None TEST=boot asurada. BRANCH=None
Signed-off-by: Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com Change-Id: I6b47473ee5d56a197bd21d4ab9b539d9663b6636 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/include/soc/mt6315.h A src/soc/mediatek/mt8192/mt6315.c 4 files changed, 349 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/45400/18
hsin-hsiung wang has uploaded a new patch set (#20) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
soc/mediatek/mt8192: add pmic MT6315 driver
Add pmic MT6315 driver.
BUG=b:155253454 BRANCH=none TEST=boot asurada correctly
Signed-off-by: Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com Change-Id: I6b47473ee5d56a197bd21d4ab9b539d9663b6636 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/include/soc/mt6315.h A src/soc/mediatek/mt8192/mt6315.c 4 files changed, 340 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/45400/20
hsin-hsiung wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 20: Code-Review+1
(5 comments)
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 212: if (pmif_arb == NULL) : pmif_arb = get_pmif_controller(PMIF_SPMI, 0);
Similar to MT6359P, I think there's no need for this.
Done
https://review.coreboot.org/c/coreboot/+/45400/1/src/soc/mediatek/mt8192/mt6... PS1, Line 324: pmif_arb
What if this is NULL?
I will call die() in get_pmif_controller().
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... PS2, Line 11: CPU
lowercase 'cpu'
Done
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... PS2, Line 106: GPU
lowercase 'gpu'
Done
https://review.coreboot.org/c/coreboot/+/45400/2/src/soc/mediatek/mt8192/mt6... PS2, Line 279: return;
No need for 'return'.
Done
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 24:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45400/24/src/soc/mediatek/mt8192/mt... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/24/src/soc/mediatek/mt8192/mt... PS24, Line 240: { Check
if (!pmif_arb) die("ERROR: pmif_arb not initialized");
Same for mt6315_buck_get_voltage().
hsin-hsiung wang has uploaded a new patch set (#25) to the change originally created by CK HU. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
soc/mediatek/mt8192: add pmic MT6315 driver
MT6315 is a buck converter for Mediatek MT8192 platform. Reference datasheet: MT6315 datasheet v1.4.2.pdf, RH-D-2019-0616.
BUG=b:155253454 BRANCH=none TEST=boot asurada correctly
Signed-off-by: Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com Change-Id: I6b47473ee5d56a197bd21d4ab9b539d9663b6636 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/include/soc/mt6315.h A src/soc/mediatek/mt8192/mt6315.c 4 files changed, 346 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/45400/25
hsin-hsiung wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 25:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45400/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45400/7//COMMIT_MSG@9 PS7, Line 9: Add pmic MT6315 driver.
Please elaborate, what the device is, and what the name and revision of the datasheet is.
MT6315 is a buck for Mediatek MT8192 platform. Reference datasheet: MT6315 datasheet v1.4.2.pdf, RH-D-2019-0616.
https://review.coreboot.org/c/coreboot/+/45400/24/src/soc/mediatek/mt8192/mt... File src/soc/mediatek/mt8192/mt6315.c:
https://review.coreboot.org/c/coreboot/+/45400/24/src/soc/mediatek/mt8192/mt... PS24, Line 240: {
Check […]
Done
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 25: Code-Review+1
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 26:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45400/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45400/7//COMMIT_MSG@9 PS7, Line 9: Add pmic MT6315 driver.
MT6315 is a buck for Mediatek MT8192 platform. […]
Done
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 26: Code-Review+2
hsin-hsiung wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
Patch Set 27: Code-Review+1
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45400 )
Change subject: soc/mediatek/mt8192: add pmic MT6315 driver ......................................................................
soc/mediatek/mt8192: add pmic MT6315 driver
MT6315 is a buck converter for Mediatek MT8192 platform. Reference datasheet: MT6315 datasheet v1.4.2.pdf, RH-D-2019-0616.
BUG=b:155253454 BRANCH=none TEST=boot asurada correctly
Signed-off-by: Hsin-Hsiung Wang hsin-hsiung.wang@mediatek.com Change-Id: I6b47473ee5d56a197bd21d4ab9b539d9663b6636 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45400 Reviewed-by: Hung-Te Lin hungte@chromium.org Reviewed-by: Yu-Ping Wu yupingso@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c A src/soc/mediatek/mt8192/include/soc/mt6315.h A src/soc/mediatek/mt8192/mt6315.c 4 files changed, 346 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved hsin-hsiung wang: Looks good to me, but someone else must approve Yu-Ping Wu: Looks good to me, but someone else must approve
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index e4f7063..3237d40 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -10,6 +10,7 @@ bootblock-y += ../common/uart.c bootblock-y += ../common/wdt.c bootblock-y += pmif.c pmif_clk.c pmif_spi.c pmif_spmi.c +bootblock-y += mt6315.c bootblock-y += mt6359p.c
verstage-y += flash_controller.c diff --git a/src/soc/mediatek/mt8192/bootblock.c b/src/soc/mediatek/mt8192/bootblock.c index d9cb684..7987b1c 100644 --- a/src/soc/mediatek/mt8192/bootblock.c +++ b/src/soc/mediatek/mt8192/bootblock.c @@ -2,6 +2,7 @@
#include <bootblock_common.h> #include <soc/mmu_operations.h> +#include <soc/mt6315.h> #include <soc/mt6359p.h> #include <soc/pll.h> #include <soc/pmif.h> @@ -14,4 +15,5 @@ mt_pll_init(); mtk_pmif_init(); mt6359p_init(); + mt6315_init(); } diff --git a/src/soc/mediatek/mt8192/include/soc/mt6315.h b/src/soc/mediatek/mt8192/include/soc/mt6315.h new file mode 100644 index 0000000..4d179be --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/mt6315.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT6315_H__ +#define __SOC_MEDIATEK_MT6315_H__ + +#include <soc/spmi.h> +#include <types.h> + +struct mt6315_setting { + unsigned short addr; + unsigned short val; + unsigned short mask; + unsigned char shift; +}; + +enum { + MT6315_CPU = SPMI_SLAVE_6, + MT6315_GPU = SPMI_SLAVE_7, + MT6315_MAX, +}; + +enum { + MT6315_BUCK_1 = 0, + MT6315_BUCK_2, + MT6315_BUCK_3, + MT6315_BUCK_4, + MT6315_BUCK_max, +}; + +enum { + MT6315_BUCK_TOP_ELR0 = 0x1449, + MT6315_BUCK_TOP_ELR3 = 0x144d, + MT6315_BUCK_VBUCK1_DBG0 = 0x1499, + MT6315_BUCK_VBUCK1_DBG3 = 0x1599, +}; + +void mt6315_init(void); +void mt6315_buck_set_voltage(u32 slvid, u32 buck_id, u32 buck_uv); +u32 mt6315_buck_get_voltage(u32 slvid, u32 buck_id); +#endif /* __SOC_MEDIATEK_MT6315_H__ */ diff --git a/src/soc/mediatek/mt8192/mt6315.c b/src/soc/mediatek/mt8192/mt6315.c new file mode 100644 index 0000000..9752e3d --- /dev/null +++ b/src/soc/mediatek/mt8192/mt6315.c @@ -0,0 +1,303 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <assert.h> +#include <console/console.h> +#include <delay.h> +#include <soc/pmif.h> +#include <soc/mt6315.h> + +static struct pmif *pmif_arb = NULL; + +static const struct mt6315_setting init_setting_cpu[] = { + /* disable magic key protection */ + {0x3A9, 0x63, 0xFF, 0}, + {0x3A8, 0x15, 0xFF, 0}, + {0x3A0, 0x9C, 0xFF, 0}, + {0x39F, 0xEA, 0xFF, 0}, + {0x993, 0x47, 0xFF, 0}, + {0x992, 0x29, 0xFF, 0}, + {0x1418, 0x55, 0xFF, 0}, + {0x1417, 0x43, 0xFF, 0}, + {0x3A2, 0x2A, 0xFF, 0}, + {0x3A1, 0x7C, 0xFF, 0}, + /* clear boot status */ + {0x12A, 0x3, 0xFF, 0}, + {0xD, 1, 0x1, 0}, + {0xD, 0, 0x1, 0}, + {0x1416, 0xF, 0xF, 0}, + /* init setting */ + {0x13, 0x2, 0x2, 0}, + {0x15, 0x1F, 0x1F, 0}, + {0x22, 0x12, 0x12, 0}, + {0x8A, 0x6, 0xF, 0}, + {0x10B, 0x3, 0x3, 0}, + {0x38B, 0x4, 0xFF, 0}, + {0xA07, 0x0, 0x1, 0}, + {0xA1A, 0x1F, 0x1F, 0}, + {0x1457, 0x0, 0xFF, 0}, + {0x997, 0x7, 0x7F, 0}, + {0x999, 0xF0, 0xF0, 0}, + {0x9A0, 0x1, 0x1F, 0}, + {0x9A1, 0x1, 0x1F, 0}, + {0x9A2, 0x0, 0x1F, 0}, + {0x9A3, 0x1, 0x1F, 0}, + {0x1440, 0x0, 0xA, 0}, + {0x1487, 0x58, 0xFF, 0}, + {0x148B, 0x1, 0x7F, 0}, + {0x148C, 0x2, 0x7F, 0}, + {0x1507, 0x58, 0xFF, 0}, + {0x150B, 0x1, 0x7F, 0}, + {0x150C, 0x2, 0x7F, 0}, + {0x1587, 0x58, 0xFF, 0}, + {0x158B, 0x1, 0x7F, 0}, + {0x158C, 0x4, 0x7F, 0}, + {0x1607, 0x58, 0xFF, 0}, + {0x160B, 0x1, 0x7F, 0}, + {0x160C, 0x2, 0x7F, 0}, + {0x1687, 0x22, 0x76, 0}, + {0x1688, 0xE, 0x2F, 0}, + {0x1689, 0xA1, 0xE1, 0}, + {0x168A, 0x79, 0x7F, 0}, + {0x168B, 0x12, 0x3F, 0}, + {0x168D, 0x0, 0xC, 0}, + {0x168E, 0xD7, 0xFF, 0}, + {0x168F, 0x81, 0xFF, 0}, + {0x1690, 0x13, 0x3F, 0}, + {0x1691, 0x22, 0x76, 0}, + {0x1692, 0xE, 0x2F, 0}, + {0x1693, 0xA1, 0xE1, 0}, + {0x1694, 0x79, 0x7F, 0}, + {0x1695, 0x12, 0x3F, 0}, + {0x1697, 0x0, 0xC, 0}, + {0x1698, 0xD7, 0xFF, 0}, + {0x1699, 0x81, 0xFF, 0}, + {0x169A, 0x13, 0x3F, 0}, + {0x169B, 0x20, 0x70, 0}, + {0x169C, 0xE, 0x2F, 0}, + {0x169D, 0x80, 0xC1, 0}, + {0x169E, 0xF8, 0xF8, 0}, + {0x169F, 0x12, 0x3F, 0}, + {0x16A1, 0x0, 0xC, 0}, + {0x16A2, 0xDB, 0xFF, 0}, + {0x16A3, 0xA1, 0xFF, 0}, + {0x16A4, 0x1, 0xF, 0}, + {0x16A5, 0x22, 0x76, 0}, + {0x16A6, 0xE, 0x2F, 0}, + {0x16A7, 0xA1, 0xE1, 0}, + {0x16A8, 0x79, 0xFF, 0}, + {0x16A9, 0x12, 0x3F, 0}, + {0x16AB, 0x0, 0xC, 0}, + {0x16AC, 0xD7, 0xFF, 0}, + {0x16AD, 0x81, 0xFF, 0}, + {0x16AE, 0x13, 0x3F, 0}, + /* enable magic key protection */ + {0x3A9, 0, 0xFF, 0}, + {0x3A8, 0, 0xFF, 0}, + {0x3A0, 0, 0xFF, 0}, + {0x39F, 0, 0xFF, 0}, + {0x993, 0, 0xFF, 0}, + {0x992, 0, 0xFF, 0}, + {0x1418, 0, 0xFF, 0}, + {0x1417, 0, 0xFF, 0}, + {0x3a2, 0, 0xFF, 0}, + {0x3a1, 0, 0xFF, 0}, +}; + +static const struct mt6315_setting init_setting_gpu[] = { + /* disable magic key protection */ + {0x3A9, 0x63, 0xFF, 0}, + {0x3A8, 0x15, 0xFF, 0}, + {0x3A0, 0x9C, 0xFF, 0}, + {0x39F, 0xEA, 0xFF, 0}, + {0x993, 0x47, 0xFF, 0}, + {0x992, 0x29, 0xFF, 0}, + {0x1418, 0x55, 0xFF, 0}, + {0x1417, 0x43, 0xFF, 0}, + {0x3a2, 0x2A, 0xFF, 0}, + {0x3a1, 0x7C, 0xFF, 0}, + /* init setting */ + {0x13, 0x2, 0x2, 0}, + {0x15, 0x1F, 0x1F, 0}, + {0x22, 0x12, 0x12, 0}, + {0x8A, 0x6, 0xF, 0}, + {0x10B, 0x3, 0x3, 0}, + {0x38B, 0x4, 0xFF, 0}, + {0xA07, 0x0, 0x1, 0}, + {0xA1A, 0x1F, 0x1F, 0}, + {0x1457, 0x0, 0xFF, 0}, + {0x997, 0x2F, 0x7F, 0}, + {0x999, 0xF0, 0xF0, 0}, + {0x9A0, 0x0, 0x1F, 0}, + {0x9A1, 0x0, 0x1F, 0}, + {0x9A2, 0xB, 0x1F, 0}, + {0x9A3, 0x0, 0x1F, 0}, + {0x1440, 0x0, 0xA, 0}, + {0x1487, 0x58, 0xFF, 0}, + {0x148B, 0x1, 0x7F, 0}, + {0x148C, 0x4, 0x7F, 0}, + {0x1507, 0x58, 0xFF, 0}, + {0x150B, 0x1, 0x7F, 0}, + {0x150C, 0x4, 0x7F, 0}, + {0x1587, 0x58, 0xFF, 0}, + {0x158B, 0x1, 0x7F, 0}, + {0x158C, 0x4, 0x7F, 0}, + {0x1607, 0x58, 0xFF, 0}, + {0x160B, 0x1, 0x7F, 0}, + {0x160C, 0x4, 0x7F, 0}, + {0x1687, 0x22, 0x76, 0}, + {0x1688, 0xE, 0x2F, 0}, + {0x1689, 0xA1, 0xE1, 0}, + {0x168A, 0x79, 0x7F, 0}, + {0x168B, 0x12, 0x3F, 0}, + {0x168D, 0x0, 0xC, 0}, + {0x168E, 0xD7, 0xFF, 0}, + {0x168F, 0x81, 0xFF, 0}, + {0x1690, 0x13, 0x3F, 0}, + {0x1691, 0x22, 0x76, 0}, + {0x1692, 0xE, 0x2F, 0}, + {0x1693, 0xA1, 0xE1, 0}, + {0x1694, 0x79, 0x7F, 0}, + {0x1695, 0x12, 0x3F, 0}, + {0x1697, 0x0, 0xC, 0}, + {0x1698, 0xD7, 0xFF, 0}, + {0x1699, 0x81, 0xFF, 0}, + {0x169A, 0x13, 0x3F, 0}, + {0x169B, 0x22, 0x76, 0}, + {0x169C, 0xE, 0x2F, 0}, + {0x169D, 0xA1, 0xE1, 0}, + {0x169E, 0x79, 0x7F, 0}, + {0x169F, 0x12, 0x3F, 0}, + {0x16A1, 0x0, 0xC, 0}, + {0x16A2, 0xD7, 0xFF, 0}, + {0x16A3, 0x81, 0xFF, 0}, + {0x16A4, 0x13, 0x3F, 0}, + {0x16A5, 0x22, 0x76, 0}, + {0x16A6, 0xE, 0x2F, 0}, + {0x16A7, 0xA1, 0xE1, 0}, + {0x16A8, 0x79, 0xFF, 0}, + {0x16A9, 0x12, 0x3F, 0}, + {0x16AB, 0x0, 0xC, 0}, + {0x16AC, 0xD7, 0xFF, 0}, + {0x16AD, 0x81, 0xFF, 0}, + {0x16AE, 0x13, 0x3F, 0}, + /* Don't remove this! it's MT6315 for GPU only to disable VBUCK3 */ + {0x1440, 0x0, 0x4, 0}, + /* enable magic key protection */ + {0x3A9, 0, 0xFF, 0}, + {0x3A8, 0, 0xFF, 0}, + {0x3A0, 0, 0xFF, 0}, + {0x39F, 0, 0xFF, 0}, + {0x993, 0, 0xFF, 0}, + {0x992, 0, 0xFF, 0}, + {0x1418, 0, 0xFF, 0}, + {0x1417, 0, 0xFF, 0}, + {0x3a2, 0, 0xFF, 0}, + {0x3a1, 0, 0xFF, 0}, +}; + +static void mt6315_read(u32 slvid, u32 reg, u32 *data) +{ + pmif_arb->read(pmif_arb, slvid, reg, data); +} + +static void mt6315_write(u32 slvid, u32 reg, u32 data) +{ + pmif_arb->write(pmif_arb, slvid, reg, data); +} + +static void mt6315_write_field(u32 slvid, u32 reg, u32 val, u32 mask, u32 shift) +{ + pmif_arb->write_field(pmif_arb, 0, reg, val, mask, shift); +} + +static void mt6315_wdt_enable(u32 slvid) +{ + mt6315_write(slvid, 0x3A9, 0x63); + mt6315_write(slvid, 0x3A8, 0x15); + mt6315_write(slvid, 0x127, 0x2); + mt6315_write(slvid, 0x127, 0x1); + mt6315_write(slvid, 0x127, 0x8); + udelay(50); + mt6315_write(slvid, 0x128, 0x8); + mt6315_write(slvid, 0x3A9, 0); + mt6315_write(slvid, 0x3A8, 0); +} + +static void mt6315_init_setting(void) +{ + for (int i = 0; i < ARRAY_SIZE(init_setting_cpu); i++) + mt6315_write_field(MT6315_CPU, + init_setting_cpu[i].addr, init_setting_cpu[i].val, + init_setting_cpu[i].mask, init_setting_cpu[i].shift); + + for (int i = 0; i < ARRAY_SIZE(init_setting_gpu); i++) + mt6315_write_field(MT6315_GPU, + init_setting_gpu[i].addr, init_setting_gpu[i].val, + init_setting_gpu[i].mask, init_setting_gpu[i].shift); +} + +void mt6315_buck_set_voltage(u32 slvid, u32 buck_id, u32 buck_uv) +{ + unsigned int vol_reg, vol_val; + + if (!pmif_arb) + die("ERROR: pmif_arb not initialized"); + + switch (buck_id) { + case MT6315_BUCK_1: + vol_reg = MT6315_BUCK_TOP_ELR0; + break; + case MT6315_BUCK_3: + vol_reg = MT6315_BUCK_TOP_ELR3; + break; + default: + die("ERROR: Unknown buck_id %u", buck_id); + return; + }; + + vol_val = buck_uv / 6250; + mt6315_write(slvid, vol_reg, vol_val); +} + +u32 mt6315_buck_get_voltage(u32 slvid, u32 buck_id) +{ + u32 vol_reg, vol; + + if (!pmif_arb) + die("ERROR: pmif_arb not initialized"); + + switch (buck_id) { + case MT6315_BUCK_1: + vol_reg = MT6315_BUCK_VBUCK1_DBG0; + break; + case MT6315_BUCK_3: + vol_reg = MT6315_BUCK_VBUCK1_DBG3; + break; + default: + die("ERROR: Unknown buck_id %u", buck_id); + return 0; + }; + + mt6315_read(slvid, vol_reg, &vol); + return vol * 6250; +} + +static void init_pmif_arb(void) +{ + if (!pmif_arb) { + pmif_arb = get_pmif_controller(PMIF_SPMI, 0); + if (!pmif_arb) + die("ERROR: No spmi device"); + } + + if (pmif_arb->is_pmif_init_done(pmif_arb)) + die("ERROR - Failed to initialize pmif spmi"); +} + +void mt6315_init(void) +{ + init_pmif_arb(); + mt6315_wdt_enable(MT6315_CPU); + mt6315_wdt_enable(MT6315_GPU); + mt6315_init_setting(); +}
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