Change in coreboot[master]: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Duan huayang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Current the DRAM control only support 4GB DDR, add more large size DDR support to meet the market requirement.
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan huayang.duan@mediatek.com --- M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c 8 files changed, 16 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/42035/1
diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c index 6b53bcc..c339d54 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x22, 0x1b}, {0x22, 0x19} }, [CHANNEL_B] = { {0x24, 0x20}, {0x25, 0x20} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c index 74b642d..e8dcb82 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x22, 0x1C}, {0x23, 0x1D} }, [CHANNEL_B] = { {0x26, 0x23}, {0x26, 0x23} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c index 5617ff9..65a54da 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x21, 0x21}, {0x20, 0x20} }, [CHANNEL_B] = { {0x1E, 0x1F}, {0x1D, 0x1E} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c index fc31a18f..0f5003a 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x22, 0x21}, {0x20, 0x21} }, [CHANNEL_B] = { {0x23, 0x27}, {0x23, 0x27} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c index df37f1a..b44bba3 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x21, 0x24}, {0x22, 0x24} }, [CHANNEL_B] = { {0x24, 0x28}, {0x22, 0x27} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c index a5764d2..06ec402 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x21, 0x21}, {0x20, 0x20} }, [CHANNEL_B] = { {0x21, 0x28}, {0x21, 0x29} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c index 97a8e2d..3c16325 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x1F, 0x19}, {0x20, 0x1A} }, [CHANNEL_B] = { {0x22, 0x1E}, {0x22, 0x1E} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c index 2de4be0..606d7c8 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x1F, 0x1C}, {0x1C, 0x1B} }, [CHANNEL_B] = { {0x27, 0x28}, {0x23, 0x28} }
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42035/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42035/1//COMMIT_MSG@8 PS1, Line 8: : Current the DRAM control only support 4GB DDR, add more large size DDR support : to meet the market requirement. Set correct DDR geometry for all existing memory modules.
Duan huayang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42035/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42035/1//COMMIT_MSG@8 PS1, Line 8: : Current the DRAM control only support 4GB DDR, add more large size DDR support : to meet the market requirement.
Set correct DDR geometry for all existing memory modules.
Done
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42035
to look at the new patch set (#2).
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Set correct DDR geometry for all existing memory modules.
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan huayang.duan@mediatek.com --- M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c 8 files changed, 16 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/42035/2
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 4: Code-Review+1
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 5: Code-Review+1
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 5:
Does the parent commit still work without this change? If not, they should be squashed.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 5:
Patch Set 5:
Does the parent commit still work without this change? If not, they should be squashed.
I just had the same question. Since DDR_TYPE_2CH_2RK_4GB_2_2 is the default value (= 0), the parent CL should work fine without this one.
Hello build bot (Jenkins), Paul Menzel, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42035
to look at the new patch set (#6).
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Set correct DDR geometry for all existing memory modules.
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan huayang.duan@mediatek.com --- M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c 9 files changed, 17 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/42035/6
Duan huayang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 7:
Patch Set 5:
Patch Set 5:
Does the parent commit still work without this change? If not, they should be squashed.
I just had the same question. Since DDR_TYPE_2CH_2RK_4GB_2_2 is the default value (= 0), the parent CL should work fine without this one.
why we consider the case of without this change?
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 9:
Patch Set 7:
Patch Set 5:
Patch Set 5:
Does the parent commit still work without this change? If not, they should be squashed.
I just had the same question. Since DDR_TYPE_2CH_2RK_4GB_2_2 is the default value (= 0), the parent CL should work fine without this one.
why we consider the case of without this change?
If the parent CL of this CL does NOT work without this one, we should squash them into a single CL. In other words, the parent CL should not be dependent on this CL.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 9: Code-Review+1
Duan huayang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 10:
Patch Set 9:
Patch Set 7:
Patch Set 5:
Patch Set 5:
Does the parent commit still work without this change? If not, they should be squashed.
I just had the same question. Since DDR_TYPE_2CH_2RK_4GB_2_2 is the default value (= 0), the parent CL should work fine without this one.
why we consider the case of without this change?
If the parent CL of this CL does NOT work without this one, we should squash them into a single CL. In other words, the parent CL should not be dependent on this CL.
got it
Hello build bot (Jenkins), Paul Menzel, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42035
to look at the new patch set (#11).
Change subject: google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Set correct DDR geometry for all existing memory modules.
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan huayang.duan@mediatek.com --- M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c M src/soc/mediatek/mt8183/include/soc/dramc_param.h M src/soc/mediatek/mt8183/include/soc/emi.h 11 files changed, 25 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/42035/11
Hello build bot (Jenkins), Paul Menzel, Julius Werner, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42035
to look at the new patch set (#13).
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Set correct DDR geometry for all existing memory modules.
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan huayang.duan@mediatek.com --- M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c 9 files changed, 17 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/42035/13
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 13: Code-Review+1
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42035/13/src/mainboard/google/kukui... File src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c:
https://review.coreboot.org/c/coreboot/+/42035/13/src/mainboard/google/kukui... PS13, Line 6: source missing ddr geometry?
Hello build bot (Jenkins), Paul Menzel, Julius Werner, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42035
to look at the new patch set (#14).
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Set correct DDR geometry for all existing memory modules.
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan huayang.duan@mediatek.com --- M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c 9 files changed, 18 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/42035/14
Duan huayang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 14:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42035/13/src/mainboard/google/kukui... File src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c:
https://review.coreboot.org/c/coreboot/+/42035/13/src/mainboard/google/kukui... PS13, Line 6: source
missing ddr geometry?
Done
Hello build bot (Jenkins), Paul Menzel, Julius Werner, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42035
to look at the new patch set (#15).
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Set correct DDR geometry for all existing memory modules.
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan huayang.duan@mediatek.com --- M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E2G32D4NQ-046-8GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c 10 files changed, 19 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/42035/15
Duan huayang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 15:
also set .ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4 for DDR MT53E2G32D4NQ-046-8GB
Hello build bot (Jenkins), Paul Menzel, Julius Werner, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42035
to look at the new patch set (#16).
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Set correct DDR geometry for all existing memory modules.
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan huayang.duan@mediatek.com --- M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E2G32D4NQ-046-8GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c 10 files changed, 20 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/42035/16
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 16: Code-Review+2
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42035 )
Change subject: mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
mb/google/kukui: Add ddr geometry to support 6GB, 8GB DDR bootup
Set correct DDR geometry for all existing memory modules.
BUG=none BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I9b53ab2bf43e0dfb7448eb37a18faf686267eaed Signed-off-by: Huayang Duan huayang.duan@mediatek.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42035 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Hung-Te Lin hungte@chromium.org --- M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E2G32D4NQ-046-8GB.c M src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c 10 files changed, 20 insertions(+), 10 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved
diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c index cf5c4d2..767fa4a 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMALHR-4GB.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x22, 0x1b}, {0x22, 0x19} }, [CHANNEL_B] = { {0x24, 0x20}, {0x25, 0x20} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c index cf5c4d2..05cd6df 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB.c @@ -1,9 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .frequency = 1600, .wr_level = { [CHANNEL_A] = { {0x22, 0x1b}, {0x22, 0x19} }, diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c index e95df6c..1734797 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x22, 0x1C}, {0x23, 0x1D} }, [CHANNEL_B] = { {0x26, 0x23}, {0x26, 0x23} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c index a984478..a7f2123 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDH6001DA-B422-4GB.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x21, 0x21}, {0x20, 0x20} }, [CHANNEL_B] = { {0x1E, 0x1F}, {0x1D, 0x1E} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c index 95e9091..8141d2a 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x22, 0x21}, {0x20, 0x21} }, [CHANNEL_B] = { {0x23, 0x27}, {0x23, 0x27} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c index 3792182..74e8187 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x21, 0x24}, {0x22, 0x24} }, [CHANNEL_B] = { {0x24, 0x28}, {0x22, 0x27} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c index 3011283..53028b0 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x21, 0x21}, {0x20, 0x20} }, [CHANNEL_B] = { {0x21, 0x28}, {0x21, 0x29} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c index 81887b5..26b12bf 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x1F, 0x19}, {0x20, 0x1A} }, [CHANNEL_B] = { {0x22, 0x1E}, {0x22, 0x1E} } diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E2G32D4NQ-046-8GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E2G32D4NQ-046-8GB.c index 81887b5..20f0c4a 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E2G32D4NQ-046-8GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E2G32D4NQ-046-8GB.c @@ -1,9 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, + .ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4, .frequency = 1600, .wr_level = { [CHANNEL_A] = { {0x1F, 0x19}, {0x20, 0x1A} }, diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c index eaebc75..1dd5d94 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-SDADA4CR-128G-4GB.c @@ -1,10 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <soc/emi.h> +#include <soc/dramc_param.h>
struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x1F, 0x1C}, {0x1C, 0x1B} }, [CHANNEL_B] = { {0x27, 0x28}, {0x23, 0x28} }
-
Duan huayang (Code Review) -
Hung-Te Lin (Code Review)
-
Paul Menzel (Code Review)
-
Yu-Ping Wu (Code Review)