Change in coreboot[master]: cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()

[Aaron Durbin (Code Review)]

Aaron Durbin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41897 )

Change subject: cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()
......................................................................

cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()

There's not a function that is the equivalent to
x86_setup_mtrrs_with_detect() but not solving for above 4GiB.
Provide x86_setup_mtrrs_with_detect_no_above_4gb() which is the
equivalent to x86_setup_mtrrs_with_detect() but instructs the MTRR
solver to not take into account memory above 4GiB.

BUG=b:155426691

Signed-off-by: Aaron Durbin 
Change-Id: Ia1b5d67d6f139aaa929e03ddbc394d57dfb949e0
---
M src/cpu/x86/mtrr/mtrr.c
M src/include/cpu/x86/mtrr.h
2 files changed, 16 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/41897/1

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 6187578..f74cef3 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -775,7 +775,7 @@
    commit_var_mtrrs(sol);
 }

-void x86_setup_mtrrs(void)
+static void _x86_setup_mtrrs(unsigned int above4gb)
 {
    int address_size;

@@ -783,14 +783,26 @@
    address_size = cpu_phys_address_size();
    printk(BIOS_DEBUG, "CPU physical address size: %d bits\n",
    	address_size);
+	x86_setup_var_mtrrs(address_size, above4gb);
+}
+
+void x86_setup_mtrrs(void)
+{
    /* Always handle addresses above 4GiB. */
-	x86_setup_var_mtrrs(address_size, 1);
+	_x86_setup_mtrrs(1);
 }

void x86_setup_mtrrs_with_detect(void)
 {
    detect_var_mtrrs();
-	x86_setup_mtrrs();
+	/* Always handle addresses above 4GiB. */
+	_x86_setup_mtrrs(1);
+}
+
+void x86_setup_mtrrs_with_detect_no_above_4gb(void)
+{
+	detect_var_mtrrs();
+	_x86_setup_mtrrs(0);
 }

void x86_mtrr_check(void)
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index 552941e..2d758d2 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -78,6 +78,7 @@
  * it always dynamically detects the number of variable MTRRs available.
  */
 void x86_setup_mtrrs_with_detect(void);
+void x86_setup_mtrrs_with_detect_no_above_4gb(void);
 /*
  * x86_setup_var_mtrrs() parameters:
  * address_bits - number of physical address bits supported by cpu

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41897 )

Change subject: cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()
......................................................................

Patch Set 1: Code-Review+1

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41897 )

Change subject: cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()
......................................................................

Patch Set 2: Code-Review+2

[Aaron Durbin (Code Review)]

Aaron Durbin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41897 )

Change subject: cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()
......................................................................

cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()

There's not a function that is the equivalent to
x86_setup_mtrrs_with_detect() but not solving for above 4GiB.
Provide x86_setup_mtrrs_with_detect_no_above_4gb() which is the
equivalent to x86_setup_mtrrs_with_detect() but instructs the MTRR
solver to not take into account memory above 4GiB.

BUG=b:155426691

Signed-off-by: Aaron Durbin 
Change-Id: Ia1b5d67d6f139aaa929e03ddbc394d57dfb949e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41897
Reviewed-by: Furquan Shaikh 
Reviewed-by: Paul Menzel 
Tested-by: build bot (Jenkins) 
---
M src/cpu/x86/mtrr/mtrr.c
M src/include/cpu/x86/mtrr.h
2 files changed, 16 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 1f37659..77525a7 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -774,7 +774,7 @@
    commit_var_mtrrs(sol);
 }

-void x86_setup_mtrrs(void)
+static void _x86_setup_mtrrs(unsigned int above4gb)
 {
    int address_size;

@@ -782,14 +782,26 @@
    address_size = cpu_phys_address_size();
    printk(BIOS_DEBUG, "CPU physical address size: %d bits\n",
    	address_size);
+	x86_setup_var_mtrrs(address_size, above4gb);
+}
+
+void x86_setup_mtrrs(void)
+{
    /* Always handle addresses above 4GiB. */
-	x86_setup_var_mtrrs(address_size, 1);
+	_x86_setup_mtrrs(1);
 }

void x86_setup_mtrrs_with_detect(void)
 {
    detect_var_mtrrs();
-	x86_setup_mtrrs();
+	/* Always handle addresses above 4GiB. */
+	_x86_setup_mtrrs(1);
+}
+
+void x86_setup_mtrrs_with_detect_no_above_4gb(void)
+{
+	detect_var_mtrrs();
+	_x86_setup_mtrrs(0);
 }

void x86_mtrr_check(void)
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index c1ee51a..4123304 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -77,6 +77,7 @@
  * it always dynamically detects the number of variable MTRRs available.
  */
 void x86_setup_mtrrs_with_detect(void);
+void x86_setup_mtrrs_with_detect_no_above_4gb(void);
 /*
  * x86_setup_var_mtrrs() parameters:
  * address_bits - number of physical address bits supported by cpu

[9elements QA (Code Review)]

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41897 )

Change subject: cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()
......................................................................

Patch Set 3:

Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4
Emulation targets:
"QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4677
"QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4676
"QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4675
"QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4674

Please note: This test is under development and might not be accurate at all!