HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33526
Change subject: src: Add missing include <device/pci_ops.h> ......................................................................
src: Add missing include <device/pci_ops.h>
Change-Id: Iae73fc1557fb310dacbbf8bc486dc3cc5249d9e7 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/cpu/amd/family_10h-family_15h/fidvid.c M src/northbridge/via/vx900/early_host_bus_ctl.c M src/northbridge/via/vx900/pci_util.c M src/soc/intel/quark/acpi.c M src/southbridge/amd/sb800/early_setup.c M src/southbridge/broadcom/bcm5785/early_setup.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 8 files changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/33526/1
diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c index 2c6e08c..c5d523a 100644 --- a/src/cpu/amd/family_10h-family_15h/fidvid.c +++ b/src/cpu/amd/family_10h-family_15h/fidvid.c @@ -91,6 +91,7 @@
#include <console/console.h> #include <cpu/amd/msr.h> +#include <device/pci_ops.h> #include <inttypes.h> #include <northbridge/amd/amdht/AsPsDefs.h>
diff --git a/src/northbridge/via/vx900/early_host_bus_ctl.c b/src/northbridge/via/vx900/early_host_bus_ctl.c index 92bb44d..1ef2944 100644 --- a/src/northbridge/via/vx900/early_host_bus_ctl.c +++ b/src/northbridge/via/vx900/early_host_bus_ctl.c @@ -14,6 +14,8 @@ * GNU General Public License for more details. */
+#include <device/pci_ops.h> + #include "early_vx900.h"
static void vx900_cpu_bus_preram_setup(void) diff --git a/src/northbridge/via/vx900/pci_util.c b/src/northbridge/via/vx900/pci_util.c index 07a9a71..e6eb91a 100644 --- a/src/northbridge/via/vx900/pci_util.c +++ b/src/northbridge/via/vx900/pci_util.c @@ -15,6 +15,7 @@ */
#include <console/console.h> +#include <device/pci_ops.h>
#include "vx900.h"
diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c index 2cb5adf..ffcd91f 100644 --- a/src/soc/intel/quark/acpi.c +++ b/src/soc/intel/quark/acpi.c @@ -16,6 +16,7 @@ */
#include <console/console.h> +#include <device/pci_ops.h> #include <soc/acpi.h> #include <soc/ramstage.h>
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index eaa47e3..b549c5e 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -18,6 +18,7 @@
#include <arch/io.h> #include <console/console.h> +#include <device/pci_ops.h> #include <reset.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/common/reset.h> diff --git a/src/southbridge/broadcom/bcm5785/early_setup.c b/src/southbridge/broadcom/bcm5785/early_setup.c index a8a38f2..8ea776f7 100644 --- a/src/southbridge/broadcom/bcm5785/early_setup.c +++ b/src/southbridge/broadcom/bcm5785/early_setup.c @@ -15,6 +15,7 @@ */
#include <arch/io.h> +#include <device/pci_ops.h> #include <reset.h> #include <southbridge/amd/common/reset.h> #include "bcm5785.h" diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c index 156c387..ee85109 100644 --- a/src/southbridge/nvidia/ck804/early_setup_car.c +++ b/src/southbridge/nvidia/ck804/early_setup_car.c @@ -18,6 +18,7 @@
#include <arch/io.h> #include <console/console.h> +#include <device/pci_ops.h> #include <reset.h> #include <southbridge/amd/common/reset.h>
diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c index 908cdd5..69d12bf 100644 --- a/src/southbridge/nvidia/mcp55/early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/early_setup_car.c @@ -18,6 +18,7 @@ #include <arch/io.h> #include <delay.h> #include <console/console.h> +#include <device/pci_ops.h>
#ifdef UNUSED_CODE int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val);
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33526 )
Change subject: src: Add missing include <device/pci_ops.h> ......................................................................
Patch Set 2: Code-Review+1
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33526 )
Change subject: src: Add missing include <device/pci_ops.h> ......................................................................
Patch Set 7:
(8 comments)
https://review.coreboot.org/c/coreboot/+/33526/7/src/cpu/amd/family_10h-fami... File src/cpu/amd/family_10h-family_15h/fidvid.c:
https://review.coreboot.org/c/coreboot/+/33526/7/src/cpu/amd/family_10h-fami... PS7, Line 133: needs #include <device/pci_ops.h>
https://review.coreboot.org/c/coreboot/+/33526/7/src/northbridge/via/vx900/e... File src/northbridge/via/vx900/early_host_bus_ctl.c:
https://review.coreboot.org/c/coreboot/+/33526/7/src/northbridge/via/vx900/e... PS7, Line 22: needs #include <device/pci_ops.h>
https://review.coreboot.org/c/coreboot/+/33526/7/src/northbridge/via/vx900/p... File src/northbridge/via/vx900/pci_util.c:
https://review.coreboot.org/c/coreboot/+/33526/7/src/northbridge/via/vx900/p... PS7, Line 36: needs #include <device/pci_ops.h>
https://review.coreboot.org/c/coreboot/+/33526/7/src/soc/intel/quark/acpi.c File src/soc/intel/quark/acpi.c:
https://review.coreboot.org/c/coreboot/+/33526/7/src/soc/intel/quark/acpi.c@... PS7, Line 37: needs #include <device/pci_ops.h>
https://review.coreboot.org/c/coreboot/+/33526/7/src/southbridge/amd/sb800/e... File src/southbridge/amd/sb800/early_setup.c:
https://review.coreboot.org/c/coreboot/+/33526/7/src/southbridge/amd/sb800/e... PS7, Line 90: needs #include <device/pci_ops.h>
https://review.coreboot.org/c/coreboot/+/33526/7/src/southbridge/broadcom/bc... File src/southbridge/broadcom/bcm5785/early_setup.c:
https://review.coreboot.org/c/coreboot/+/33526/7/src/southbridge/broadcom/bc... PS7, Line 30: needs #include <device/pci_ops.h>
https://review.coreboot.org/c/coreboot/+/33526/7/src/southbridge/nvidia/ck80... File src/southbridge/nvidia/ck804/early_setup_car.c:
https://review.coreboot.org/c/coreboot/+/33526/7/src/southbridge/nvidia/ck80... PS7, Line 350: needs #include <device/pci_ops.h>
https://review.coreboot.org/c/coreboot/+/33526/7/src/southbridge/nvidia/mcp5... File src/southbridge/nvidia/mcp55/early_setup_car.c:
https://review.coreboot.org/c/coreboot/+/33526/7/src/southbridge/nvidia/mcp5... PS7, Line 128: needs #include <device/pci_ops.h>
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33526 )
Change subject: src: Add missing include <device/pci_ops.h> ......................................................................
Patch Set 7: Code-Review+2
Looks good
Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33526 )
Change subject: src: Add missing include <device/pci_ops.h> ......................................................................
src: Add missing include <device/pci_ops.h>
Change-Id: Iae73fc1557fb310dacbbf8bc486dc3cc5249d9e7 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/33526 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/cpu/amd/family_10h-family_15h/fidvid.c M src/northbridge/via/vx900/early_host_bus_ctl.c M src/northbridge/via/vx900/pci_util.c M src/soc/intel/quark/acpi.c M src/southbridge/amd/sb800/early_setup.c M src/southbridge/broadcom/bcm5785/early_setup.c M src/southbridge/nvidia/ck804/early_setup_car.c M src/southbridge/nvidia/mcp55/early_setup_car.c 8 files changed, 9 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c index 2c6e08c..c5d523a 100644 --- a/src/cpu/amd/family_10h-family_15h/fidvid.c +++ b/src/cpu/amd/family_10h-family_15h/fidvid.c @@ -91,6 +91,7 @@
#include <console/console.h> #include <cpu/amd/msr.h> +#include <device/pci_ops.h> #include <inttypes.h> #include <northbridge/amd/amdht/AsPsDefs.h>
diff --git a/src/northbridge/via/vx900/early_host_bus_ctl.c b/src/northbridge/via/vx900/early_host_bus_ctl.c index 92bb44d..1ef2944 100644 --- a/src/northbridge/via/vx900/early_host_bus_ctl.c +++ b/src/northbridge/via/vx900/early_host_bus_ctl.c @@ -14,6 +14,8 @@ * GNU General Public License for more details. */
+#include <device/pci_ops.h> + #include "early_vx900.h"
static void vx900_cpu_bus_preram_setup(void) diff --git a/src/northbridge/via/vx900/pci_util.c b/src/northbridge/via/vx900/pci_util.c index 07a9a71..e6eb91a 100644 --- a/src/northbridge/via/vx900/pci_util.c +++ b/src/northbridge/via/vx900/pci_util.c @@ -15,6 +15,7 @@ */
#include <console/console.h> +#include <device/pci_ops.h>
#include "vx900.h"
diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c index 2cb5adf..ffcd91f 100644 --- a/src/soc/intel/quark/acpi.c +++ b/src/soc/intel/quark/acpi.c @@ -16,6 +16,7 @@ */
#include <console/console.h> +#include <device/pci_ops.h> #include <soc/acpi.h> #include <soc/ramstage.h>
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index eaa47e3..b549c5e 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -18,6 +18,7 @@
#include <arch/io.h> #include <console/console.h> +#include <device/pci_ops.h> #include <reset.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/common/reset.h> diff --git a/src/southbridge/broadcom/bcm5785/early_setup.c b/src/southbridge/broadcom/bcm5785/early_setup.c index a8a38f2..8ea776f7 100644 --- a/src/southbridge/broadcom/bcm5785/early_setup.c +++ b/src/southbridge/broadcom/bcm5785/early_setup.c @@ -15,6 +15,7 @@ */
#include <arch/io.h> +#include <device/pci_ops.h> #include <reset.h> #include <southbridge/amd/common/reset.h> #include "bcm5785.h" diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c index e7a06f9..e2cc40a 100644 --- a/src/southbridge/nvidia/ck804/early_setup_car.c +++ b/src/southbridge/nvidia/ck804/early_setup_car.c @@ -18,6 +18,7 @@
#include <arch/io.h> #include <console/console.h> +#include <device/pci_ops.h> #include <reset.h> #include <southbridge/amd/common/reset.h>
diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c index 908cdd5..69d12bf 100644 --- a/src/southbridge/nvidia/mcp55/early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/early_setup_car.c @@ -18,6 +18,7 @@ #include <arch/io.h> #include <delay.h> #include <console/console.h> +#include <device/pci_ops.h>
#ifdef UNUSED_CODE int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val);
-
Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)
-
Martin Roth (Code Review)