Change in ...coreboot[master]: mainboard/google/hatch: Use SpiCs options in device tree.
Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32792
Change subject: mainboard/google/hatch: Use SpiCs options in device tree. ......................................................................
mainboard/google/hatch: Use SpiCs options in device tree.
Explicitly set CsEnable, CsPolarity and DefaultCsOutput for SPI0 and SPI1 in the devicetree.
BUG=b:130329260 BRANCH=none TEST=Hatch still boots, no errors seen in coreboot output. TPM still communicates properly.
Change-Id: I481a2c2b51738d6401f8d7ee89448e982262471d Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/variants/hatch/overridetree.cb 1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/32792/1
diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index 562bb8b..12e1602 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -15,6 +15,31 @@ [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
+ register "SerialIoSpi0CsPolarity" = "{ + [0] = PchSerialIoCsActiveLow, + [1] = PchSerialIoCsActiveLow, + }" + + register "SerialIoSpi1CsPolarity" = "{ + [0] = PchSerialIoCsActiveLow, + [1] = PchSerialIoCsActiveLow, + }" + + register "SerialIoSpi0CsEnable" = "{ + [0] = PchSerialIoCsEnable, + [1] = PchSerialIoCsGpio, + }" + + register "SerialIoSpi1CsEnable" = "{ + [0] = PchSerialIoCsGpio, + [1] = PchSerialIoCsEnable, + }" + + register "SerialIoSpiDefaultCsOutput" = "{ + [0] = PchSerialIoCS0, + [1] = PchSerialIoCS1, + }" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value |
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32792 )
Change subject: mainboard/google/hatch: Use SpiCs options in device tree. ......................................................................
Patch Set 1: Code-Review+1
Tim Wawrzynczak has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32792 )
Change subject: mainboard/google/hatch: Use SpiCs options in device tree. ......................................................................
Abandoned
Tim Wawrzynczak has restored this change. ( https://review.coreboot.org/c/coreboot/+/32792 )
Change subject: mainboard/google/hatch: Use SpiCs options in device tree. ......................................................................
Restored
Hello Paul Fagerburg, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32792
to look at the new patch set (#2).
Change subject: mainboard/google/hatch: Use SpiCs options in device tree. ......................................................................
mainboard/google/hatch: Use SpiCs options in device tree.
Explicitly set CsEnable, CsPolarity and DefaultCsOutput for SPI0 and SPI1 in the base devicetree.
BUG=b:130329260 BRANCH=none TEST=Hatch still boots, no errors seen in coreboot output. TPM still communicates properly.
Change-Id: I481a2c2b51738d6401f8d7ee89448e982262471d Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/32792/2
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32792 )
Change subject: mainboard/google/hatch: Use SpiCs options in device tree. ......................................................................
Patch Set 2: Code-Review+1
Tim Wawrzynczak has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32792 )
Change subject: mainboard/google/hatch: Use SpiCs options in device tree. ......................................................................
Abandoned
-
Paul Fagerburg (Code Review) -
Tim Wawrzynczak (Code Review)