Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86161?usp=email )
(
7 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/mediatek/mt8196: Add pi_img loader in ramstage ......................................................................
soc/mediatek/mt8196: Add pi_img loader in ramstage
This patch includes loading pi_img through CBFS and passing parameters of pi_img to mtk_fsp for parsing.
BUG=b:373797027 TEST=Build pass. boot ok. Locd pi_img with following logs: CBFS: Found 'pi_img.img' @0xb2340 size 0x9620 in mcache @0xfffdd440 read SPI 0x4b43a0 0x9620: 2946 us, 13045 KB/s, 104.360 Mbps VB2:vb2_digest_init() 38432 bytes, hash algo 2, HW acceleration enabled mtk_init_mcu: Loaded (and reset) pi_img.img in 3 msecs (180421 bytes)
Change-Id: I571243c3115f5cd005fac88eb740c643e936fca9 Signed-off-by: Jarried Lin jarried.lin@mediatek.corp-partner.google.com Signed-off-by: Yidi Lin yidilin@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/86161 Reviewed-by: Yidi Lin yidilin@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/soc/mediatek/common/include/soc/mtk_fsp_common.h M src/soc/mediatek/mt8196/Kconfig M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/include/soc/pi_image.h A src/soc/mediatek/mt8196/pi_image.c M src/soc/mediatek/mt8196/soc.c 6 files changed, 69 insertions(+), 1 deletion(-)
Approvals: Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/mediatek/common/include/soc/mtk_fsp_common.h b/src/soc/mediatek/common/include/soc/mtk_fsp_common.h index 29e7ed9..bc0d92c 100644 --- a/src/soc/mediatek/common/include/soc/mtk_fsp_common.h +++ b/src/soc/mediatek/common/include/soc/mtk_fsp_common.h @@ -16,6 +16,7 @@ FSP_STATUS_PARAM_NOT_FOUND, FSP_STATUS_PARAM_INVALID_SIZE, FSP_STATUS_INVALID_STORAGE, + FSP_STATUS_INVALID_PI_IMG, };
enum fsp_phase { @@ -38,6 +39,8 @@ /* 0x40000000+ reserved for input type params */ FSP_PARAM_TYPE_IN = FSP_PARAM_IO_ENCODE(FSP_PARAM_IO_IN), FSP_PARAM_TYPE_STORAGE, + FSP_PARAM_TYPE_PI_IMG, + FSP_PARAM_TYPE_PI_IMG_CSRAM,
/* 0x80000000+ reserved for output type params */ FSP_PARAM_TYPE_OUT = FSP_PARAM_IO_ENCODE(FSP_PARAM_IO_OUT), diff --git a/src/soc/mediatek/mt8196/Kconfig b/src/soc/mediatek/mt8196/Kconfig index fe89288..9d27a5f 100644 --- a/src/soc/mediatek/mt8196/Kconfig +++ b/src/soc/mediatek/mt8196/Kconfig @@ -39,6 +39,13 @@ help The file name of the MediaTek DPM PM firmware.
+config PI_IMG_FIRMWARE + string + default "pi_img.img" + help + The file name of the MediaTek PI_IMG firmware. The main purpose of the pi_img is to + pass various frequency and voltage scaling parameters and settings to MCUPM. + config SSPM_FIRMWARE string default "sspm.bin" diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index 4cf1660..d780ebd 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -75,6 +75,7 @@ ramstage-y += mt6685_rtc.c ramstage-y += mtcmos.c ramstage-y += ../common/mtk_fsp.c +ramstage-y += pi_image.c ramstage-y += soc.c ramstage-y += ../common/spm.c spm.c ramstage-y += ../common/sspm.c sspm_sram.c @@ -97,6 +98,7 @@ $(CONFIG_DPM_PM_FIRMWARE) \ $(CONFIG_GPUEB_FIRMWARE) \ $(CONFIG_MCUPM_FIRMWARE) \ + $(CONFIG_PI_IMG_FIRMWARE) \ $(CONFIG_SSPM_FIRMWARE) \ $(CONFIG_SPM_FIRMWARE)
diff --git a/src/soc/mediatek/mt8196/include/soc/pi_image.h b/src/soc/mediatek/mt8196/include/soc/pi_image.h new file mode 100644 index 0000000..74f8ebe --- /dev/null +++ b/src/soc/mediatek/mt8196/include/soc/pi_image.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#ifndef __SOC_MEDIATEK_MT8196_PI_IMAGE_H__ +#define __SOC_MEDIATEK_MT8196_PI_IMAGE_H__ + +#include <commonlib/bsd/helpers.h> +#include <soc/mcu_common.h> + +#define PI_IMAGE_CSRAM 0x00120000 +#define PI_IMAGE_CSRAM_SIZE (16 * KiB) + +size_t pi_image_load(void **buffer); + +#endif /* __SOC_MEDIATEK_MT8196_PI_IMAGE_H__ */ diff --git a/src/soc/mediatek/mt8196/pi_image.c b/src/soc/mediatek/mt8196/pi_image.c new file mode 100644 index 0000000..d1e60e0 --- /dev/null +++ b/src/soc/mediatek/mt8196/pi_image.c @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include <arch/cache.h> +#include <assert.h> +#include <soc/mcu_common.h> +#include <soc/pi_image.h> +#include <soc/symbols.h> +#include <string.h> +#include <sys/types.h> + +static struct mtk_mcu pi_image = { + .firmware_name = CONFIG_PI_IMG_FIRMWARE +}; + +size_t pi_image_load(void **buffer) +{ + *buffer = NULL; + pi_image.load_buffer = _dram_dma; + pi_image.buffer_size = REGION_SIZE(dram_dma); + + if (mtk_init_mcu(&pi_image)) + die("%s() failed\n", __func__); + + *buffer = pi_image.load_buffer; + return pi_image.run_size; +} diff --git a/src/soc/mediatek/mt8196/soc.c b/src/soc/mediatek/mt8196/soc.c index 8aca958..2d32bc3 100644 --- a/src/soc/mediatek/mt8196/soc.c +++ b/src/soc/mediatek/mt8196/soc.c @@ -11,6 +11,7 @@ #include <soc/mt6685.h> #include <soc/mtk_fsp.h> #include <soc/pcie.h> +#include <soc/pi_image.h> #include <soc/sspm.h> #include <soc/storage.h> #include <soc/symbols.h> @@ -34,11 +35,26 @@ ram_range(dev, 0, (uintptr_t)_dram, sdram_size()); }
+static void add_pi_image_params(void) +{ + void *pi_image; + size_t pi_image_size; + pi_image_size = pi_image_load(&pi_image); + + void *csram = (void *)PI_IMAGE_CSRAM; + size_t csram_size = PI_IMAGE_CSRAM_SIZE; + + mtk_fsp_add_param(FSP_PARAM_TYPE_PI_IMG, pi_image_size, pi_image); + mtk_fsp_add_param(FSP_PARAM_TYPE_PI_IMG_CSRAM, csram_size, csram); +} + static void soc_init(struct device *dev) { - mtk_fsp_init(RAMSTAGE_SOC_INIT); uint32_t storage_type = mainboard_get_storage_type(); + + mtk_fsp_init(RAMSTAGE_SOC_INIT); mtk_fsp_add_param(FSP_PARAM_TYPE_STORAGE, sizeof(storage_type), &storage_type); + add_pi_image_params(); mtk_fsp_load_and_run();
mtk_mmu_disable_l2c_sram();