[XS] Change in coreboot[main]: sb/intel/bd82x6x: Warn about slow PCIe downstream devices

[Kyösti Mälkki (Code Review)]

Attention is currently required from: Patrick Rudolph.

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78229?usp=email )

Change subject: sb/intel/bd82x6x: Warn about slow PCIe downstream devices
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Patch Set 2: Code-Review+2

(1 comment)

File src/southbridge/intel/bd82x6x/pcie.c:

https://review.coreboot.org/c/coreboot/+/78229/comment/b8c08f00_d2056238 :
PS2, Line 242: 	if ((pci_read_config16(dev, cap + PCI_EXP_SLTSTA) & PCI_EXP_SLTSTA_PDS) &&
For PCH, if we followed the specs and had cleared SI=0, we would always read PDS=1, and the message below saying a downstream device is present is incorrect.

If this was moved to common code, SLTSTA probably should not be read at all if SI=0.