[M] Change in coreboot[main]: soc/intel/xeon_sp: Initial support for PCI multi segment groups

[Shuo Liu (Code Review)]

Attention is currently required from: Angel Pons, Annie Chen, Arthur Heymans, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Felix Held, Jincheng Li, Johnny Lin, Naresh Solanki, Nico Huber, Nill Ge, Patrick Rudolph, TangYiwei, Tim Chu.

Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79878?usp=email )

Change subject: soc/intel/xeon_sp: Initial support for PCI multi segment groups
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Patch Set 17: Code-Review+1

(2 comments)

File src/soc/intel/xeon_sp/chip_common.c:

https://review.coreboot.org/c/coreboot/+/79878/comment/ae05dc76_b97df26b :
PS15, Line 276:
> Every PCI domain has the PCI segment id set and thus every struct bus will have the correct segment  […]

I agree that once the domain objects are created, we should refer to segment id from these device structs.

https://review.coreboot.org/c/coreboot/+/79878/comment/f65fd096_bf0a1f29 :
PS15, Line 391: 			const size_t seg = hob->PlatformData.CpuQpiInfo[s].PcieSegment;
My question is more around here I suppose, since this is the only site to initially get segment id, it should be okay to keep this logic.