Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45714 )
Change subject: sb/intel/lynxpoint: Use `config_of` where possible ......................................................................
sb/intel/lynxpoint: Use `config_of` where possible
This eliminates the need to perform null-checking.
Change-Id: I88f7867d2b446a20a80417cd3758bd5406165fca Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/lynxpoint/lpc.c M src/southbridge/intel/lynxpoint/pcie.c 2 files changed, 6 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/45714/1
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index fad83b1..dc16c37 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -174,7 +174,7 @@ u32 reg32; const char *state; /* Get the chip configuration */ - config_t *config = dev->chip_info; + config_t *config = config_of(dev); u16 pmbase = get_pmbase(); int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE; int nmi_option; @@ -636,7 +636,7 @@ static void pch_lpc_add_io_resources(struct device *dev) { struct resource *res; - config_t *config = dev->chip_info; + config_t *config = config_of(dev);
/* Add the default claimed IO range for the LPC device. */ res = new_resource(dev, 0); diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c index 3e1f63b..4dd383b 100644 --- a/src/southbridge/intel/lynxpoint/pcie.c +++ b/src/southbridge/intel/lynxpoint/pcie.c @@ -145,12 +145,8 @@ rpc.pin_ownership = pci_read_config32(dev, 0x410); root_port_config_update_gbe_port();
- if (dev->chip_info != NULL) { - struct southbridge_intel_lynxpoint_config *config; - - config = dev->chip_info; - rpc.coalesce = config->pcie_port_coalesce; - } + struct southbridge_intel_lynxpoint_config *config = config_of(dev); + rpc.coalesce = config->pcie_port_coalesce; }
rp = root_port_number(dev); @@ -501,7 +497,7 @@
static void pch_pcie_early(struct device *dev) { - struct southbridge_intel_lynxpoint_config *config = dev->chip_info; + struct southbridge_intel_lynxpoint_config *config = config_of(dev); int do_aspm = 0; int rp = root_port_number(dev); int is_lp = pch_is_lp(); @@ -559,7 +555,7 @@ }
/* Allow ASPM to be forced on in devicetree */ - if (config && (config->pcie_port_force_aspm & (1 << (rp - 1)))) + if ((config->pcie_port_force_aspm & (1 << (rp - 1)))) do_aspm = 1;
printk(BIOS_DEBUG, "PCIe Root Port %d ASPM is %sabled\n",
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45714 )
Change subject: sb/intel/lynxpoint: Use `config_of` where possible ......................................................................
Patch Set 1: Code-Review-1
(3 comments)
https://review.coreboot.org/c/coreboot/+/45714/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45714/1//COMMIT_MSG@9 PS1, Line 9: This eliminates the need to perform null-checking. Use it in places where null-checks are missing.
https://review.coreboot.org/c/coreboot/+/45714/1/src/southbridge/intel/lynxp... File src/southbridge/intel/lynxpoint/pcie.c:
https://review.coreboot.org/c/coreboot/+/45714/1/src/southbridge/intel/lynxp... PS1, Line 148: struct southbridge_intel_lynxpoint_config *config = config_of(dev); Not a good idea
https://review.coreboot.org/c/coreboot/+/45714/1/src/southbridge/intel/lynxp... PS1, Line 500: struct southbridge_intel_lynxpoint_config *config = config_of(dev); Not a good idea
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/45714 )
Change subject: sb/intel/lynxpoint: Use `config_of` where possible ......................................................................
Abandoned
-
Angel Pons (Code Review)