Attention is currently required from: Arthur Heymans, Felix Singer, Subrata Banik, Angel Pons, Patrick Rudolph, EricR Lai. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60405 )
Change subject: soc/intel/common/cse: Implement HECI notify ......................................................................
Patch Set 8:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60405/comment/3cb299c6_ce5d05d6 PS8, Line 9: required heci operation `the required HECI operations`
File src/soc/intel/common/block/cse/cse_eop.c:
https://review.coreboot.org/c/coreboot/+/60405/comment/4856ceaf_099b68d0 PS7, Line 279: HeciEnabled
Ah, the HECI device can be enabled and initialised in coreboot, but hidden before booting an OS. […]
Yes I have been on vacation, good guess 😄
I think I like where you're going here guys: 0) Drop HeciEnabled 1) Always keep the HECI devices (at least HECI1) to perform all of the CSE operations, instead of using BOOT_STATE entries 2) A Kconfig to decide whether or not to "function disable" the CSE/HECI devices before booting the payload. a) The means of doing this (via HECI_DISABLE_USING_SMM for example) is chipset-specific and irrelevant to the point at hand.
This means coreboot can handle all of the required CSE operations, but the user can decide to disable CSE before payload if desired.
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Tim Wawrzynczak (Code Review)