Change in coreboot[master]: mb/google/dedede/var/storo: Update DPTF parameters

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55388 )

Change subject: mb/google/dedede/var/storo: Update DPTF parameters
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mb/google/dedede/var/storo: Update DPTF parameters

Update DPTF parameters from internal thermal team.

BUG=b:180875582
BRANCH=dedede
TEST=emerge-dedede coreboot

Signed-off-by: Tao Xia 
Change-Id: Ica2f2856000c8dcbf4d23b7b4a3c479dc7d4862b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55388
Tested-by: build bot (Jenkins) 
Reviewed-by: Karthik Ramasubramanian 
Reviewed-by: Sumeet R Pawnikar 
---
M src/mainboard/google/dedede/variants/storo/overridetree.cb
1 file changed, 43 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Sumeet R Pawnikar: Looks good to me, approved
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/mainboard/google/dedede/variants/storo/overridetree.cb b/src/mainboard/google/dedede/variants/storo/overridetree.cb
index 6336192..bcd094b 100644
--- a/src/mainboard/google/dedede/variants/storo/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/storo/overridetree.cb
@@ -63,7 +63,50 @@
    	[PchSerialIoIndexI2C5] = PchSerialIoPci,
    }"

+	register "power_limits_config" = "{
+		.tdp_pl1_override = 7,
+		.tdp_pl2_override = 20,
+	}"
+
+	register "tcc_offset" = "5"    # TCC of 100C
+
    device domain 0 on
+		device pci 04.0 on
+			chip drivers/intel/dptf
+				## Passive Policy
+				register "policies.passive" = "{
+					[0] = DPTF_PASSIVE(CPU,     TEMP_SENSOR_1, 60,  3000),
+					[1] = DPTF_PASSIVE(CPU,     TEMP_SENSOR_2, 60,  3000),
+					[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 60,  3000),}"
+				## Critical Policy
+				register "policies.critical" = "{
+					[0] = DPTF_CRITICAL(CPU,          105, SHUTDOWN),
+					[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 80, SHUTDOWN),
+					[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
+					[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),}"
+				register "controls.power_limits.pl1" = "{
+						.min_power = 3000,
+						.max_power = 7000,
+						.time_window_min = 28 * MSECS_PER_SEC,
+						.time_window_max = 28 * MSECS_PER_SEC,
+						.granularity = 125,}"
+				register "controls.power_limits.pl2" = "{
+						.min_power = 20000,
+						.max_power = 20000,
+						.time_window_min = 28 * MSECS_PER_SEC,
+						.time_window_max = 32 * MSECS_PER_SEC,
+						.granularity = 1000,}"
+				## Charger Performance Control (Control, mA)
+				register "controls.charger_perf" = "{
+					[0] = { 255, 3000 },
+					[1] = {  32, 2000 },
+					[2] = {  24, 1500 },
+					[3] = {  16, 1000 },
+					[4] = {   8,  500 }
+				}"
+				device generic 0 on end
+			end
+		end # SA Thermal device
    	device pci 05.0 on # IPU - MIPI Camera
    		chip drivers/intel/mipi_camera
    			register "acpi_uid" = "0x50000"