[S] Change in coreboot[main]: soc/intel/adl: Handle critical low battery early in romstage

[Subrata Banik (Code Review)]

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Julius Werner, Jérémy Compostella, Kapil Porwal, Karthik Ramasubramanian, Nick Vaccaro.

Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86227?usp=email )

Change subject: soc/intel/adl: Handle critical low battery early in romstage
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Patch Set 4:

(3 comments)

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/86227/comment/6686e196_e0114672?usp... :
PS3, Line 421: if (CONFIG(EC_GOOGLE_CHROMEEC) && google_chromeec_is_below_critical_threshold()) {
> > I would recommend to decouple ChromeEC and SoC code as much as possible. […]

Acknowledged

https://review.coreboot.org/c/coreboot/+/86227/comment/ff3ceebc_7b4b662f?usp... :
PS3, Line 425: 		elog_add_event_byte(ELOG_TYPE_LOW_BATTERY_INDICATOR, ELOG_FW_ISSUE_SHUTDOWN);
> You should log the event before you delay, in case the system browns out in those 3 seconds.

Acknowledged

https://review.coreboot.org/c/coreboot/+/86227/comment/882cbc6f_b7c4477b?usp... :
PS3, Line 446: 			early_shutdown_if_battery_below_critical_threshold();
> > Oh, okay, so this isn't mutually exclusive with the ramstage version, this is only for the memory  […]

Acknowledged