[S] Change in coreboot[main]: mb/google/guybrush: Set PS2K_IRQ to level/low

[Paul Menzel (Code Review)]

Attention is currently required from: Jason Nien, Karthik Ramasubramanian, Mark Hasemeyer, Martin L Roth.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78137?usp=email )

The change is no longer submittable: All-Comments-Resolved is unsatisfied now.

Change subject: mb/google/guybrush: Set PS2K_IRQ to level/low
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Patch Set 3:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/78137/comment/6411c0a5_d53ab058 :
PS3, Line 12: From https://review.coreboot.org/c/coreboot/+/54924:
git operates with the hashes (74bce48f1d445053b217913df79a77dfe286e893), so I’d use that.

https://review.coreboot.org/c/coreboot/+/78137/comment/29677777_e0ddd6c5 :
PS3, Line 13:   > The default state for the IRQ lines when the eSPI controller comes
            :   > out of reset is high. This is because the IRQ lines are shared with
            :   > the other IRQ sources using AND gates. This means that in order to
            :   > not cause any spurious interrupts or miss any interrupts, the
            :   > IO-APIC must use a low polarity trigger.
Remove the trailing two spaces?