Tristan Hsieh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31118
Change subject: google/kukui: Implement HW reset function ......................................................................
google/kukui: Implement HW reset function
Asserting GPIO PERIPHERAL_EN8 will send a signal to EC to trigger a HW reset for SoC and H1.
BUG=b:80501386 BRANCH=none TEST=emerge-elm coreboot; emerge-kukui coreboot; manually verified the do_board_reset() on Kukui P1
Change-Id: I9afad84af2031a766bc08fc76c8b5f55588c453a Signed-off-by: Tristan Shieh tristan.shieh@mediatek.com --- M src/mainboard/google/kukui/Makefile.inc M src/mainboard/google/kukui/gpio.h A src/mainboard/google/kukui/reset.c M src/soc/mediatek/common/include/soc/wdt.h M src/soc/mediatek/common/wdt.c A src/soc/mediatek/common/wdt_reset.c M src/soc/mediatek/mt8173/Makefile.inc 7 files changed, 58 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/31118/1
diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc index acd2c45..9f8c313 100644 --- a/src/mainboard/google/kukui/Makefile.inc +++ b/src/mainboard/google/kukui/Makefile.inc @@ -4,15 +4,18 @@ bootblock-y += bootblock.c bootblock-y += chromeos.c bootblock-y += memlayout.ld +bootblock-y += reset.c decompressor-y += memlayout.ld
verstage-y += chromeos.c +verstage-y += reset.c verstage-y += verstage.c verstage-y += memlayout.ld
romstage-y += boardid.c romstage-y += chromeos.c romstage-y += memlayout.ld +romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c
@@ -20,3 +23,4 @@ ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += memlayout.ld +ramstage-y += reset.c diff --git a/src/mainboard/google/kukui/gpio.h b/src/mainboard/google/kukui/gpio.h index 20a50a6..024b0d7 100644 --- a/src/mainboard/google/kukui/gpio.h +++ b/src/mainboard/google/kukui/gpio.h @@ -21,6 +21,7 @@ #define EC_IRQ GPIO(PERIPHERAL_EN1) #define EC_IN_RW GPIO(PERIPHERAL_EN14) #define CR50_IRQ GPIO(PERIPHERAL_EN3) +#define GPIO_RESET GPIO(PERIPHERAL_EN8)
void setup_chromeos_gpios(void);
diff --git a/src/mainboard/google/kukui/reset.c b/src/mainboard/google/kukui/reset.c new file mode 100644 index 0000000..609ecb4 --- /dev/null +++ b/src/mainboard/google/kukui/reset.c @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <gpio.h> +#include <reset.h> + +#include "gpio.h" + +void do_board_reset(void) +{ + gpio_output(GPIO_RESET, 1); +} diff --git a/src/soc/mediatek/common/include/soc/wdt.h b/src/soc/mediatek/common/include/soc/wdt.h index a15434c..b24be28 100644 --- a/src/soc/mediatek/common/include/soc/wdt.h +++ b/src/soc/mediatek/common/include/soc/wdt.h @@ -17,6 +17,7 @@ #define SOC_MEDIATEK_COMMON_WDT_H
#include <stdint.h> +#include <soc/addressmap.h>
struct mtk_wdt_regs { u32 wdt_mode; @@ -48,6 +49,8 @@ MTK_WDT_STA_HW_RST = 1 << 31 };
+static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE; + int mtk_wdt_init(void);
#endif /* SOC_MEDIATEK_COMMON_WDT_H */ diff --git a/src/soc/mediatek/common/wdt.c b/src/soc/mediatek/common/wdt.c index 9964c5a..b433c98 100644 --- a/src/soc/mediatek/common/wdt.c +++ b/src/soc/mediatek/common/wdt.c @@ -15,13 +15,9 @@
#include <arch/io.h> #include <console/console.h> -#include <reset.h> -#include <soc/addressmap.h> #include <soc/wdt.h> #include <vendorcode/google/chromeos/chromeos.h>
-static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE; - int mtk_wdt_init(void) { uint32_t wdt_sta; @@ -56,8 +52,3 @@
return wdt_sta; } - -void do_board_reset(void) -{ - write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY); -} diff --git a/src/soc/mediatek/common/wdt_reset.c b/src/soc/mediatek/common/wdt_reset.c new file mode 100644 index 0000000..855e34f --- /dev/null +++ b/src/soc/mediatek/common/wdt_reset.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <reset.h> +#include <soc/wdt.h> + +void do_board_reset(void) +{ + write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY); +} diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc index b004c27..91d3f8e 100644 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -27,7 +27,7 @@
bootblock-y += ../common/gpio.c gpio.c gpio_init.c bootblock-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c -bootblock-y += ../common/wdt.c +bootblock-y += ../common/wdt.c ../common/wdt_reset.c bootblock-y += ../common/mmu_operations.c mmu_operations.c
################################################################################ @@ -39,7 +39,7 @@
verstage-y += ../common/timer.c verstage-y += timer.c -verstage-y += ../common/wdt.c +verstage-y += ../common/wdt.c ../common/wdt_reset.c verstage-$(CONFIG_SPI_FLASH) += flash_controller.c verstage-y += ../common/gpio.c gpio.c
@@ -75,7 +75,7 @@ ramstage-y += mt6311.c ramstage-y += da9212.c ramstage-y += ../common/gpio.c gpio.c -ramstage-y += ../common/wdt.c +ramstage-y += ../common/wdt.c ../common/wdt_reset.c ramstage-y += ../common/pll.c pll.c ramstage-y += rtc.c
Tristan Hsieh has removed Hung-Te Lin from this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Removed reviewer Hung-Te Lin.
Tristan Hsieh has removed You-Cheng Syu from this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Removed reviewer You-Cheng Syu.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Patch Set 1:
(1 comment)
I think we should split this into few CLs:
1. Refactor wdt and move wdt_reset to reset.c (maybe add CONFIG_MISSING_BOARD_RESET to kukui so it won't build fail) 2. Add board-specific implementation to kukui.
Or, we should consider doing weak link for board_reset...
https://review.coreboot.org/#/c/31118/1/src/soc/mediatek/common/wdt_reset.c File src/soc/mediatek/common/wdt_reset.c:
https://review.coreboot.org/#/c/31118/1/src/soc/mediatek/common/wdt_reset.c@... PS1, Line 2: file In other SOC, this is usually simply called reset.c. I think we should follow the convention even if the implementation is using watchdog.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Patch Set 1:
Or, we should consider doing weak link for board_reset...
I mean do_board_reset
Hello Julius Werner, You-Cheng Syu, Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31118
to look at the new patch set (#2).
Change subject: google/kukui: Implement HW reset function ......................................................................
google/kukui: Implement HW reset function
Asserting GPIO PERIPHERAL_EN8 will send a signal to EC to trigger a HW reset for SoC and H1.
BUG=b:80501386 BRANCH=none TEST=emerge-kukui coreboot; manually verified the do_board_reset() on Kukui P1
Change-Id: I9afad84af2031a766bc08fc76c8b5f55588c453a Signed-off-by: Tristan Shieh tristan.shieh@mediatek.com --- M src/mainboard/google/kukui/Kconfig M src/mainboard/google/kukui/Makefile.inc M src/mainboard/google/kukui/gpio.h A src/mainboard/google/kukui/reset.c 4 files changed, 29 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/31118/2
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/31118/2/src/mainboard/google/kukui/Makefile.... File src/mainboard/google/kukui/Makefile.inc:
https://review.coreboot.org/#/c/31118/2/src/mainboard/google/kukui/Makefile.... PS2, Line 7: bootblock-y += reset.c this implies we're adding back gpio stack to bootblock...
maybe see youcheng's feedback on this
Tristan Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Patch Set 2:
(1 comment)
Patch Set 1:
(1 comment)
I think we should split this into few CLs:
- Refactor wdt and move wdt_reset to reset.c (maybe add CONFIG_MISSING_BOARD_RESET to kukui so it won't build fail)
- Add board-specific implementation to kukui.
Or, we should consider doing weak link for board_reset...
Done. Thanks.
https://review.coreboot.org/#/c/31118/1/src/soc/mediatek/common/wdt_reset.c File src/soc/mediatek/common/wdt_reset.c:
https://review.coreboot.org/#/c/31118/1/src/soc/mediatek/common/wdt_reset.c@... PS1, Line 2: file
In other SOC, this is usually simply called reset.c. […]
Done
Tristan Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/31118/2/src/mainboard/google/kukui/Makefile.... File src/mainboard/google/kukui/Makefile.inc:
https://review.coreboot.org/#/c/31118/2/src/mainboard/google/kukui/Makefile.... PS2, Line 7: bootblock-y += reset.c
this implies we're adding back gpio stack to bootblock... […]
Seems we don't need do_board_reset() in bootblock at this moment. IS it OK that we just remove this line?
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Patch Set 2:
With the comments addressed, this looks good.
Hello Julius Werner, You-Cheng Syu, Hung-Te Lin, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31118
to look at the new patch set (#3).
Change subject: google/kukui: Implement HW reset function ......................................................................
google/kukui: Implement HW reset function
Asserting GPIO PERIPHERAL_EN8 will send a signal to EC to trigger a HW reset for SoC and H1.
BUG=b:80501386 BRANCH=none TEST=emerge-kukui coreboot; manually verified the do_board_reset() on Kukui P1
Change-Id: I9afad84af2031a766bc08fc76c8b5f55588c453a Signed-off-by: Tristan Shieh tristan.shieh@mediatek.com --- M src/mainboard/google/kukui/Kconfig M src/mainboard/google/kukui/Makefile.inc M src/mainboard/google/kukui/gpio.h A src/mainboard/google/kukui/reset.c 4 files changed, 29 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/31118/3
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Patch Set 3: Code-Review+1
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31118 )
Change subject: google/kukui: Implement HW reset function ......................................................................
google/kukui: Implement HW reset function
Asserting GPIO PERIPHERAL_EN8 will send a signal to EC to trigger a HW reset for SoC and H1.
BUG=b:80501386 BRANCH=none TEST=emerge-kukui coreboot; manually verified the do_board_reset() on Kukui P1
Change-Id: I9afad84af2031a766bc08fc76c8b5f55588c453a Signed-off-by: Tristan Shieh tristan.shieh@mediatek.com Reviewed-on: https://review.coreboot.org/c/31118 Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Julius Werner jwerner@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/kukui/Kconfig M src/mainboard/google/kukui/Makefile.inc M src/mainboard/google/kukui/gpio.h A src/mainboard/google/kukui/reset.c 4 files changed, 29 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Julius Werner: Looks good to me, approved
diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig index 902fa38..7635e5f 100644 --- a/src/mainboard/google/kukui/Kconfig +++ b/src/mainboard/google/kukui/Kconfig @@ -37,7 +37,6 @@ select EC_GOOGLE_CHROMEEC_SPI select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT select MAINBOARD_HAS_TPM2 if VBOOT - select MISSING_BOARD_RESET
config MAINBOARD_DIR string diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc index acd2c45..9f8c313 100644 --- a/src/mainboard/google/kukui/Makefile.inc +++ b/src/mainboard/google/kukui/Makefile.inc @@ -4,15 +4,18 @@ bootblock-y += bootblock.c bootblock-y += chromeos.c bootblock-y += memlayout.ld +bootblock-y += reset.c decompressor-y += memlayout.ld
verstage-y += chromeos.c +verstage-y += reset.c verstage-y += verstage.c verstage-y += memlayout.ld
romstage-y += boardid.c romstage-y += chromeos.c romstage-y += memlayout.ld +romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c
@@ -20,3 +23,4 @@ ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += memlayout.ld +ramstage-y += reset.c diff --git a/src/mainboard/google/kukui/gpio.h b/src/mainboard/google/kukui/gpio.h index 20a50a6..024b0d7 100644 --- a/src/mainboard/google/kukui/gpio.h +++ b/src/mainboard/google/kukui/gpio.h @@ -21,6 +21,7 @@ #define EC_IRQ GPIO(PERIPHERAL_EN1) #define EC_IN_RW GPIO(PERIPHERAL_EN14) #define CR50_IRQ GPIO(PERIPHERAL_EN3) +#define GPIO_RESET GPIO(PERIPHERAL_EN8)
void setup_chromeos_gpios(void);
diff --git a/src/mainboard/google/kukui/reset.c b/src/mainboard/google/kukui/reset.c new file mode 100644 index 0000000..609ecb4 --- /dev/null +++ b/src/mainboard/google/kukui/reset.c @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <gpio.h> +#include <reset.h> + +#include "gpio.h" + +void do_board_reset(void) +{ + gpio_output(GPIO_RESET, 1); +}
-
Hung-Te Lin (Code Review) -
Julius Werner (Code Review)
-
Patrick Georgi (Code Review)
-
Paul Menzel (Code Review)
-
Tristan Hsieh (Code Review)