Nick Vaccaro has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74030 )
Change subject: mb/google/brya/var/taniks: remove rtd3 for emmc ......................................................................
mb/google/brya/var/taniks: remove rtd3 for emmc
Remove rtd3 for emmc device on taniks
BUG=b:271003060 TEST=emerge-brya coreboot, flash to DUT and can boot to OS
Signed-off-by: Joey Peng joey.peng@lcfc.corp-partner.google.com Change-Id: I03168ecbf4611f05acd8c6c722b6a5037a8cc31d Reviewed-on: https://review.coreboot.org/c/coreboot/+/74030 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/brya/variants/taniks/overridetree.cb 1 file changed, 19 insertions(+), 10 deletions(-)
Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb index acacec3..01baf40 100644 --- a/src/mainboard/google/brya/variants/taniks/overridetree.cb +++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb @@ -350,21 +350,12 @@ end end device ref pcie_rp9 on - # Enable NVMe PCIE 9 using clk 0 + # Enable PCIE 9 using clk 0 for eMMC register "pch_pcie_rp[PCH_RP(9)]" = "{ .clk_src = 0, .clk_req = 0, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" - chip soc/intel/common/block/pcie/rtd3 - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D11)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)" - register "srcclk_pin" = "0" - register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL" - device generic 0 on - probe BOOT_EMMC_MASK BOOT_EMMC_ENABLED - end - end probe BOOT_EMMC_MASK BOOT_EMMC_ENABLED end device ref pch_espi on