Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57226 )
Change subject: mb/intel/kblrvp: Disable I2C #4 and #5 on PCH-H ......................................................................
mb/intel/kblrvp: Disable I2C #4 and #5 on PCH-H
The I2C #4 and I2C #5 devices do not exist on PCH-H. Disable the devices using the PCH-H variants' overridetrees (the base devicetree enables I2C #4), set the `SerialIoDevMode` entries to `PchSerialIoDisabled` and drop inapplicable I2C #4 voltage settings.
Change-Id: I56f34fa2004993d2123ccd5c1008fd71682ec2bd Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/57226 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb 2 files changed, 3 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index bc4a677..2301f7e 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -72,9 +72,6 @@ register "usb3_ports[8]" = "USB3_PORT_DEFAULT(OC2)" # Stack Conn register "usb3_ports[9]" = "USB3_PORT_DEFAULT(OC1)" # LAN MAGJACK
- - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ [0] = 1, \ @@ -91,7 +88,7 @@ [PchSerialIoIndexI2C1] = PchSerialIoPci, \ [PchSerialIoIndexI2C2] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C3] = PchSerialIoDisabled, \ - [PchSerialIoIndexI2C4] = PchSerialIoPci, \ + [PchSerialIoIndexI2C4] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C5] = PchSerialIoDisabled, \ [PchSerialIoIndexSpi0] = PchSerialIoDisabled, \ [PchSerialIoIndexSpi1] = PchSerialIoDisabled, \ @@ -108,7 +105,7 @@ device domain 0 on device pci 04.0 off end # SA thermal subsystem device pci 17.0 on end # SATA - device pci 19.1 on end # I2C #5 + device pci 19.2 off end # I2C #4 device pci 1e.1 on end # UART #1 device pci 1e.2 on end # GSPI #0 device pci 1e.3 on end # GSPI #1 diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index a76159b..17d4486 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -160,7 +160,7 @@
device domain 0 on device pci 17.0 on end # SATA - device pci 19.1 on end # I2C #5 + device pci 19.2 off end # I2C #4 device pci 1c.0 off end # PCI Express Port 1 device pci 1c.2 on end # PCI Express Port 3 device pci 1c.3 on end # PCI Express Port 4
1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.
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Felix Held (Code Review)