[M] Change in coreboot[master]: configs/builder: add default config for Intel Archer City CRB

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71969 )

(

13 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: configs/builder: add default config for Intel Archer City CRB
......................................................................

configs/builder: add default config for Intel Archer City CRB

which is based on Intel Sapphire Rapids Scalable Processor chipset
which was product launched on Jan. 10 2023.

The site-local/* files are Intel binaries that are not published yet
but coreboot build validation system would skip these binaries when
they are in "site-local" directory.
Please make sure you have the correct Intel binaries for your AC CRB
and place them to the right location accordingly.

CONFIG_PAYLOAD_FILE="site-local/archercity/linuxboot_bzImage" is
LinuxBoot payload, there are several ways to build it, one way is to
build it from the x86_64 qemu example from osf-builder:
git clone https://github.com/linuxboot/osf-builder
cd examples/qemu; make kernel

commit ae90fc0bb (soc/intel/xeon_sp/spr: Default to X2APIC support)
would enable DEFAULT_X2APIC_RUNTIME, your LinuxBoot kernel needs to
enable X2APIC support, otherwise need to set CONFIG_XAPIC_ONLY=y in
your defconfig.

Change-Id: I15aefc3edb2d22fc00d854850e948fe2048a992e
Signed-off-by: Johnny Lin 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71969
Reviewed-by: Angel Pons 
Reviewed-by: Jonathan Zhang 
Reviewed-by: Johnny Lin 
Tested-by: build bot (Jenkins) 
---
A configs/builder/config.intel.crb.ac
1 file changed, 58 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, but someone else must approve
  Jonathan Zhang: Looks good to me, approved
  Johnny Lin: Looks good to me, approved

diff --git a/configs/builder/config.intel.crb.ac b/configs/builder/config.intel.crb.ac
new file mode 100644
index 0000000..d2db58d
--- /dev/null
+++ b/configs/builder/config.intel.crb.ac
@@ -0,0 +1,23 @@
+# Intel ArcherCity CRB is a dual socket CRB based on Intel
+# Sapphire Rapids Scalable Processor (SPR-SP) chipset.
+#
+# Type this in coreboot root directory to get a working .config:
+#   make defconfig KBUILD_DEFCONFIG=configs/builder/config.intel.crb.ac
+
+CONFIG_VENDOR_INTEL=y
+CONFIG_BOARD_INTEL_ARCHERCITY_CRB=y
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_LINUX_COMMAND_LINE="loglevel=7 earlyprintk=serial,ttyS0,115200 console=ttyS0,115200"
+CONFIG_PAYLOAD_LINUX=y
+CONFIG_PAYLOAD_FILE="site-local/archercity/linuxboot_bzImage"
+CONFIG_HAVE_ME_BIN=y
+CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y
+CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_T_FILE="site-local/archercity/Server_T.fd"
+CONFIG_FSP_M_FILE="site-local/archercity/Server_M.fd"
+CONFIG_FSP_S_FILE="site-local/archercity/Server_S.fd"
+CONFIG_IFD_BIN_PATH="site-local/archercity/descriptor.bin"
+CONFIG_ME_BIN_PATH="site-local/archercity/me.bin"
+CONFIG_CPU_UCODE_BINARIES="site-local/archercity/mbf806f8.mcb"
+CONFIG_VALIDATE_INTEL_DESCRIPTOR=y