Change in coreboot[master]: soc/intel/common: Include Alder Lake SATA controller device IDs
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44298 )
Change subject: soc/intel/common: Include Alder Lake SATA controller device IDs ......................................................................
soc/intel/common: Include Alder Lake SATA controller device IDs
Document Number: 619501, 619362
Change-Id: Id3440b415ca80edebb6880b8b48f6094ebea4ae4 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/include/device/pci_ids.h 1 file changed, 12 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/44298/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 05900da..589e50c 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3276,6 +3276,18 @@ #define PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA 0x4b60 #define PCI_DEVICE_ID_INTEL_JSP_SATA_1 0x4dd2 #define PCI_DEVICE_ID_INTEL_JSP_SATA_2 0x4dd3 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_1 0x7a52 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_2 0x7a53 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_3 0x7a54 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_4 0x7a55 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_5 0x7a56 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_6 0x7a57 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_1 0x7ae2 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_2 0x7ae3 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_3 0x7ae4 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_4 0x7ae5 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_5 0x7ae6 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_6 0x7ae7
/* Intel PMC device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_LP_PMC 0x9d21
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44298 )
Change subject: soc/intel/common: Include Alder Lake SATA controller device IDs ......................................................................
Patch Set 1: Code-Review+2
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44298 )
Change subject: soc/intel/common: Include Alder Lake SATA controller device IDs ......................................................................
soc/intel/common: Include Alder Lake SATA controller device IDs
Document Number: 619501, 619362
Change-Id: Id3440b415ca80edebb6880b8b48f6094ebea4ae4 Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44298 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/include/device/pci_ids.h 1 file changed, 12 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 05900da..589e50c 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3276,6 +3276,18 @@ #define PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA 0x4b60 #define PCI_DEVICE_ID_INTEL_JSP_SATA_1 0x4dd2 #define PCI_DEVICE_ID_INTEL_JSP_SATA_2 0x4dd3 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_1 0x7a52 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_2 0x7a53 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_3 0x7a54 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_4 0x7a55 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_5 0x7a56 +#define PCI_DEVICE_ID_INTEL_ADP_P_SATA_6 0x7a57 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_1 0x7ae2 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_2 0x7ae3 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_3 0x7ae4 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_4 0x7ae5 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_5 0x7ae6 +#define PCI_DEVICE_ID_INTEL_ADP_S_SATA_6 0x7ae7
/* Intel PMC device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_LP_PMC 0x9d21
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Angel Pons (Code Review) -
Subrata Banik (Code Review)