Change in coreboot[master]: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48202 )

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

drivers/intel/fsp2_0/memory_init: Wrap calls into FSP

Use a wrapper code that does nothing on x86_32, but drops to protected
mode to call into FSP when running on x86_64.

Tested on Intel Skylake when running in long mode. Successfully run the
FSP-M which is compiled for x86_32 and then continued booting in long mode.

Change-Id: I9fb37019fb0d04f74d00733ce2e365f484d97d66
Signed-off-by: Patrick Rudolph 
---
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/silicon_init.c
2 files changed, 8 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/48202/1

diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 27e34fe..00927ac 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -22,6 +22,7 @@
 #include <security/tpm/tspi.h>
 #include <vb2_api.h>
 #include <types.h>
+#include <mode_switch.h>

static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t));

@@ -296,7 +297,7 @@

post_code(POST_FSP_MEMORY_INIT);
    timestamp_add_now(TS_FSP_MEMORY_INIT_START);
-	status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr());
+	status = protected_mode_call_2arg(fsp_raminit, (uintptr_t)&fspm_upd, (uintptr_t)fsp_get_hob_list_ptr());
    post_code(POST_FSP_MEMORY_EXIT);
    timestamp_add_now(TS_FSP_MEMORY_INIT_END);

diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 0b6540e..fc5b41b 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -13,6 +13,7 @@
 #include <string.h>
 #include <timestamp.h>
 #include <types.h>
+#include <mode_switch.h>

struct fsp_header fsps_hdr;

@@ -117,7 +118,11 @@

timestamp_add_now(TS_FSP_SILICON_INIT_START);
    post_code(POST_FSP_SILICON_INIT);
-	status = silicon_init(upd);
+
+	status = protected_mode_call_1arg(silicon_init, (uintptr_t)upd);
+
+	printk(BIOS_ERR, "FSPS returned %x\n", status);
+
    timestamp_add_now(TS_FSP_SILICON_INIT_END);
    post_code(POST_FSP_SILICON_EXIT);

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48202 )

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48202/1/src/drivers/intel/fsp2_0/me... 
File src/drivers/intel/fsp2_0/memory_init.c:

https://review.coreboot.org/c/coreboot/+/48202/1/src/drivers/intel/fsp2_0/me... 
PS1, Line 300: 	status = protected_mode_call_2arg(fsp_raminit, (uintptr_t)&fspm_upd, (uintptr_t)fsp_get_hob_list_ptr());
line over 96 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48202 )

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48202/2/src/drivers/intel/fsp2_0/me... 
File src/drivers/intel/fsp2_0/memory_init.c:

https://review.coreboot.org/c/coreboot/+/48202/2/src/drivers/intel/fsp2_0/me... 
PS2, Line 300: 	status = protected_mode_call_2arg(fsp_raminit, (uintptr_t)&fspm_upd, (uintptr_t)fsp_get_hob_list_ptr());
line over 96 characters

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48202 )

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48202/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/48202/2//COMMIT_MSG@13 
PS2, Line 13: mode.
Please wrap at 72 characters. Did you test x86_32 to see if it still works?

[Patrick Rudolph (Code Review)]

Hello build bot (Jenkins), Andrey Petrov, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/48202

to look at the new patch set (#3).

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

drivers/intel/fsp2_0/memory_init: Wrap calls into FSP

Use a wrapper code that does nothing on x86_32, but drops to protected
mode to call into FSP when running on x86_64.

Tested on Intel Skylake when running in long mode. Successfully run the
FSP-M which is compiled for x86_32 and then continued booting in long mode.

Change-Id: I9fb37019fb0d04f74d00733ce2e365f484d97d66
Signed-off-by: Patrick Rudolph 
---
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/notify.c
M src/drivers/intel/fsp2_0/silicon_init.c
3 files changed, 10 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/48202/3

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48202 )

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

Patch Set 3: Code-Review+2

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48202 )

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48202/3/src/drivers/intel/fsp2_0/me... 
File src/drivers/intel/fsp2_0/memory_init.c:

https://review.coreboot.org/c/coreboot/+/48202/3/src/drivers/intel/fsp2_0/me... 
PS3, Line 300: 	status = protected_mode_call_2arg(fsp_raminit, (uintptr_t)&fspm_upd, (uintptr_t)fsp_get_hob_list_ptr());
line over 96 characters

[Patrick Rudolph (Code Review)]

Hello build bot (Jenkins), Arthur Heymans, Andrey Petrov, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/48202

to look at the new patch set (#4).

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

drivers/intel/fsp2_0/memory_init: Wrap calls into FSP

Use a wrapper code that does nothing on x86_32, but drops to protected
mode to call into FSP when running on x86_64.

Tested on Intel Skylake when running in long mode. Successfully run the
FSP-M which is compiled for x86_32 and then continued booting in long mode.

Change-Id: I9fb37019fb0d04f74d00733ce2e365f484d97d66
Signed-off-by: Patrick Rudolph 
---
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/notify.c
M src/drivers/intel/fsp2_0/silicon_init.c
3 files changed, 22 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/48202/4

[Patrick Rudolph (Code Review)]

Hello build bot (Jenkins), Arthur Heymans, Andrey Petrov, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/48202

to look at the new patch set (#6).

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

drivers/intel/fsp2_0/memory_init: Wrap calls into FSP

Use a wrapper code that does nothing on x86_32, but drops to protected
mode to call into FSP when running on x86_64.

Tested on Intel Skylake when running in long mode. Successfully run the
FSP-M which is compiled for x86_32 and then continued booting in
long mode.

Change-Id: I9fb37019fb0d04f74d00733ce2e365f484d97d66
Signed-off-by: Patrick Rudolph 
---
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/notify.c
M src/drivers/intel/fsp2_0/silicon_init.c
3 files changed, 22 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/48202/6

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48202 )

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

Patch Set 6: Code-Review+2

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48202 )

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

Patch Set 6:

(1 comment)

Tested on x86_32 as well, still boots.

https://review.coreboot.org/c/coreboot/+/48202/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/48202/2//COMMIT_MSG@13 
PS2, Line 13: mode.
> Please wrap at 72 characters. […]

Done

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48202 )

Change subject: drivers/intel/fsp2_0/memory_init: Wrap calls into FSP
......................................................................

drivers/intel/fsp2_0/memory_init: Wrap calls into FSP

Use a wrapper code that does nothing on x86_32, but drops to protected
mode to call into FSP when running on x86_64.

Tested on Intel Skylake when running in long mode. Successfully run the
FSP-M which is compiled for x86_32 and then continued booting in
long mode.

Change-Id: I9fb37019fb0d04f74d00733ce2e365f484d97d66
Signed-off-by: Patrick Rudolph 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48202
Reviewed-by: Arthur Heymans 
Tested-by: build bot (Jenkins) 
---
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/notify.c
M src/drivers/intel/fsp2_0/silicon_init.c
3 files changed, 22 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 27e34fe..bddd07f 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -22,6 +22,7 @@
 #include <security/tpm/tspi.h>
 #include <vb2_api.h>
 #include <types.h>
+#include <mode_switch.h>

static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t));

@@ -296,7 +297,13 @@

post_code(POST_FSP_MEMORY_INIT);
    timestamp_add_now(TS_FSP_MEMORY_INIT_START);
-	status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr());
+	if (ENV_X86_64)
+		status = protected_mode_call_2arg(fsp_raminit,
+						  (uintptr_t)&fspm_upd,
+						  (uintptr_t)fsp_get_hob_list_ptr());
+	else
+		status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr());
+
    post_code(POST_FSP_MEMORY_EXIT);
    timestamp_add_now(TS_FSP_MEMORY_INIT_END);

diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c
index ee04630..8a51c0b 100644
--- a/src/drivers/intel/fsp2_0/notify.c
+++ b/src/drivers/intel/fsp2_0/notify.c
@@ -5,6 +5,7 @@
 #include <cpu/x86/mtrr.h>
 #include <fsp/util.h>
 #include <timestamp.h>
+#include <mode_switch.h>

static void fsp_notify(enum fsp_notify_phase phase)
 {
@@ -30,7 +31,10 @@
    	post_code(POST_FSP_NOTIFY_BEFORE_END_OF_FIRMWARE);
    }

-	ret = fspnotify(&notify_params);
+	if (ENV_X86_64)
+		ret = protected_mode_call_1arg(fspnotify, (uintptr_t)&notify_params);
+	else
+		ret = fspnotify(&notify_params);

if (phase == AFTER_PCI_ENUM) {
    	timestamp_add_now(TS_FSP_AFTER_ENUMERATE);
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 0b6540e..a4ffbda 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -13,6 +13,7 @@
 #include <string.h>
 #include <timestamp.h>
 #include <types.h>
+#include <mode_switch.h>

struct fsp_header fsps_hdr;

@@ -117,7 +118,14 @@

timestamp_add_now(TS_FSP_SILICON_INIT_START);
    post_code(POST_FSP_SILICON_INIT);
-	status = silicon_init(upd);
+
+	if (ENV_X86_64)
+		status = protected_mode_call_1arg(silicon_init, (uintptr_t)upd);
+	else
+		status = silicon_init(upd);
+
+	printk(BIOS_ERR, "FSPS returned %x\n", status);
+
    timestamp_add_now(TS_FSP_SILICON_INIT_END);
    post_code(POST_FSP_SILICON_EXIT);