[M] Change in coreboot[main]: soc/mediatek/mt8196: Initialize MCUPM

[Yidi Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, agogo.

Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85888?usp=email )

Change subject: soc/mediatek/mt8196: Initialize MCUPM
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Patch Set 8: Code-Review+2

(1 comment)

File src/soc/mediatek/mt8196/mcupm.c:

https://review.coreboot.org/c/coreboot/+/85888/comment/5b62fc61_253a0d8e?usp... :
PS6, Line 21: 		       "[EB_SPMC] Polling MCU_PORT_SET_R0_0 timeout, %#x\n",
> I meant the limit (which equals the tries). […]

I think the log is fine as long as MTK thinks the information is enough for them to debug.

The comment already mentioned that is W1C (write 1 clear) register.