Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32767
Change subject: src/soc/intel/cannonlake: [TEST-ONLY]Update FSP-M upd config for cml ......................................................................
src/soc/intel/cannonlake: [TEST-ONLY]Update FSP-M upd config for cml
This patch updates the fsp-m config for cometlake platform. The FSP release from version 1155 onwards have updated fsp-m config for UART controller number used for debug logs purpose.
Change-Id: I232630f91ba6bbc953064bddab7cf0e479510fc9 Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/romstage/fsp_params.c 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/32767/1
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index 6e492bb..77bad8f 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -50,7 +50,11 @@ m_cfg->PcieRpEnableMask = mask; m_cfg->PrmrrSize = config->PrmrrSize; m_cfg->EnableC6Dram = config->enable_c6dram; +#if CONFIG(SOC_INTEL_COMETLAKE) + m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE; +#else m_cfg->PcdSerialIoUartNumber = CONFIG_UART_FOR_CONSOLE; +#endif /* * PcdDebugInterfaceFlags * This config will allow coreboot to pass information to the FSP
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32767
to look at the new patch set (#2).
Change subject: src/soc/intel/cannonlake: Update FSP-M upd config for cml ......................................................................
src/soc/intel/cannonlake: Update FSP-M upd config for cml
This patch updates the fsp-m config for cometlake platform. The FSP release from version 1155 onwards have updated fsp-m config for UART controller number used for debug logs purpose.
Change-Id: I232630f91ba6bbc953064bddab7cf0e479510fc9 Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/romstage/fsp_params.c 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/32767/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32767 )
Change subject: src/soc/intel/cannonlake: Update FSP-M upd config for cml ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/32767/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32767/2//COMMIT_MSG@7 PS2, Line 7: Update FSP-M upd config for cml I am guessing this is dependent on a particular version of FSP?
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32767 )
Change subject: src/soc/intel/cannonlake: Update FSP-M upd config for cml ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/32767/2/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32767/2/src/soc/intel/cannonlake/romstage/fs... PS2, Line 54: m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE; src/soc/intel/cannonlake/romstage/fsp_params.c:54:7: error: 'FSP_M_CONFIG' {aka 'struct <anonymous>'} has no member named 'SerialIoUartDebugControllerNumber'
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32767 )
Change subject: src/soc/intel/cannonlake: Update FSP-M upd config for cml ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/#/c/32767/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32767/2//COMMIT_MSG@7 PS2, Line 7: Update FSP-M upd config for cml
I am guessing this is dependent on a particular version of FSP?
Yes , This is for 1155 release.
https://review.coreboot.org/#/c/32767/2/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32767/2/src/soc/intel/cannonlake/romstage/fs... PS2, Line 54: m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE;
src/soc/intel/cannonlake/romstage/fsp_params. […]
there is a dependency to headers in vendorcode.
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32767 )
Change subject: src/soc/intel/cannonlake: Update FSP-M upd config for cml ......................................................................
Patch Set 3:
Moved to CL: https://review.coreboot.org/c/coreboot/+/32844/1
Aamir Bohra has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32767 )
Change subject: src/soc/intel/cannonlake: Update FSP-M upd config for cml ......................................................................
Abandoned