Change in coreboot[master]: [WIP]soc/intel/common/block/gspi: move SPI to GSPI mapping to common

[Ravishankar Sarawadi (Code Review)]

Ravishankar Sarawadi has uploaded this change for review. ( https://review.coreboot.org/25087

Change subject: [WIP]soc/intel/common/block/gspi: move SPI to GSPI mapping to common
......................................................................

[WIP]soc/intel/common/block/gspi: move SPI to GSPI mapping to common

Move SPI to GSPI bus and devfn mapping to GSPI common code.

BUG=None
BRANCH=None
TEST=Build coreboot and do BAT test for SKL, CNL platform.

Change-Id: I175ca6eab369276c693c78acc4d8ac9cd49ad152
Signed-off-by: Ravi Sarawadi 
---
M src/soc/intel/cannonlake/gspi.c
M src/soc/intel/common/block/gspi/gspi.c
M src/soc/intel/skylake/gspi.c
3 files changed, 30 insertions(+), 54 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/25087/1

diff --git a/src/soc/intel/cannonlake/gspi.c b/src/soc/intel/cannonlake/gspi.c
index e4f682d..945c8c8 100644
--- a/src/soc/intel/cannonlake/gspi.c
+++ b/src/soc/intel/cannonlake/gspi.c
@@ -43,30 +43,3 @@
 {
    return EARLY_GSPI_BASE_ADDRESS;
 }
-
-/*
- * SPI Bus 0 is Fast SPI and GSPI starts from SPI bus # 1 onwards. Thus, adjust
- * the bus # accordingly when referring to SPI / GSPI bus numbers.
- */
-#define GSPI_TO_SPI_BUS(x)	((x) + 1)
-#define SPI_TO_GSPI_BUS(x)	((x) - 1)
-
-int gspi_soc_spi_to_gspi_bus(unsigned int spi_bus, unsigned int *gspi_bus)
-{
-	if (spi_bus == 0)
-		return -1;
-
-	*gspi_bus = SPI_TO_GSPI_BUS(spi_bus);
-	if (*gspi_bus >= CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX)
-		return -1;
-
-	return 0;
-}
-
-int gspi_soc_bus_to_devfn(unsigned int gspi_bus)
-{
-	if (gspi_bus >= CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX)
-		return -1;
-
-	return spi_soc_bus_to_devfn(GSPI_TO_SPI_BUS(gspi_bus));
-}
diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c
index 60c7391..db68a2b 100644
--- a/src/soc/intel/common/block/gspi/gspi.c
+++ b/src/soc/intel/common/block/gspi/gspi.c
@@ -22,6 +22,7 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <intelblocks/gspi.h>
+#include <intelblocks/spi.h>
 #include <string.h>
 #include <timer.h>

@@ -172,6 +173,35 @@

#endif

+/*
+ * SPI Bus 0 is Fast SPI and GSPI starts from SPI bus # 1 onwards. Thus, adjust
+ * the bus # accordingly when referring to SPI / GSPI bus numbers.
+ */
+#define GSPI_TO_SPI_BUS(x)	((x) + 1)
+#define SPI_TO_GSPI_BUS(x)	((x) - 1)
+
+__attribute__((weak)) int gspi_soc_spi_to_gspi_bus(unsigned int spi_bus,
+				unsigned int *gspi_bus)
+{
+	if (spi_bus == 0)
+		return -1;
+
+	if (SPI_TO_GSPI_BUS(spi_bus) >= CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX)
+		return -1;
+
+	*gspi_bus = SPI_TO_GSPI_BUS(spi_bus);
+
+	return 0;
+}
+
+__attribute__((weak)) int gspi_soc_bus_to_devfn(unsigned int gspi_bus)
+{
+	if (gspi_bus >= CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX)
+		return -1;
+
+	return spi_soc_bus_to_devfn(GSPI_TO_SPI_BUS(gspi_bus));
+}
+
 static uintptr_t gspi_calc_base_addr(unsigned int gspi_bus)
 {
    uintptr_t bus_base, gspi_base_addr;
diff --git a/src/soc/intel/skylake/gspi.c b/src/soc/intel/skylake/gspi.c
index 252be777..393763d 100644
--- a/src/soc/intel/skylake/gspi.c
+++ b/src/soc/intel/skylake/gspi.c
@@ -42,30 +42,3 @@
 {
    return EARLY_GSPI_BASE_ADDRESS;
 }
-
-/*
- * SPI Bus 0 is Fast SPI and GSPI starts from SPI bus # 1 onwards. Thus, adjust
- * the bus # accordingly when referring to SPI / GSPI bus numbers.
- */
-#define GSPI_TO_SPI_BUS(x)	(x + 1)
-#define SPI_TO_GSPI_BUS(x)	(x - 1)
-
-int gspi_soc_spi_to_gspi_bus(unsigned int spi_bus, unsigned int *gspi_bus)
-{
-	if (spi_bus == 0)
-		return -1;
-
-	*gspi_bus = SPI_TO_GSPI_BUS(spi_bus);
-	if (*gspi_bus >= CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX)
-		return -1;
-
-	return 0;
-}
-
-int gspi_soc_bus_to_devfn(unsigned int gspi_bus)
-{
-	if (gspi_bus >= CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX)
-		return -1;
-
-	return spi_soc_bus_to_devfn(GSPI_TO_SPI_BUS(gspi_bus));
-}