Change in coreboot[master]: soc/intel/alderlake: Fix value of SA_DEVFN_CPU_PCIE1_0 - coreboot-gerrit

8 Dec 2021


      Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Nick Vaccaro, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59981 )
Change subject: soc/intel/alderlake: Fix value of SA_DEVFN_CPU_PCIE1_0
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
File src/soc/intel/alderlake/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/59981/comment/5a7803df_ab206135 
PS1, Line 29: SA_DEV_SLOT_CPU_1
oops 😭
Its mostly me!
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If6d294d681907c51ac5678c9251364d4d6df4329
Gerrit-Change-Number: 59981
Gerrit-PatchSet: 1
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Gerrit-Reviewer: Maulik V Vaghela maulik.v.vaghela@intel.com
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