Change in ...coreboot[master]: src/soc/intel/common/smbios: Add addtional infos to dimm_info
Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33031
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
src/soc/intel/common/smbios: Add addtional infos to dimm_info
Added ECC Support and VDD Voltage to dimm_info struct. Now Bus Width and ECCSupport will be propagated correctly in SMBIOS Type 17 Entry.
Change-Id: Ic6f0d4b223f1490ec7aa71a6105603635b514021 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/arch/x86/smbios.c M src/include/memory_info.h M src/soc/intel/apollolake/meminit_util_apl.c M src/soc/intel/apollolake/meminit_util_glk.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/smbios.c M src/soc/intel/common/smbios.h M src/soc/intel/icelake/romstage/romstage.c M src/soc/intel/skylake/romstage/romstage_fsp20.c 9 files changed, 42 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/33031/1
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index bf627f2..54c2b09 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -372,6 +372,11 @@ dimm->module_part_number[DIMM_INFO_PART_NUMBER_SIZE - 1] = '\0'; smbios_fill_dimm_part_number((char *)dimm->module_part_number, t);
+ /* Voltage Levels */ + t->configured_voltage = dimm->vdd_voltage; + t->minimum_voltage = dimm->vdd_voltage; + t->maximum_voltage = dimm->vdd_voltage; + /* Synchronous = 1 */ t->type_detail = 0x0080; /* no handle for error information */ diff --git a/src/include/memory_info.h b/src/include/memory_info.h index 93c7b6b..c11e745 100644 --- a/src/include/memory_info.h +++ b/src/include/memory_info.h @@ -86,6 +86,10 @@ * See the smbios.h smbios_memory_bus_width enum. */ uint8_t bus_width; + /* + * Voltage Level + */ + uint32_t vdd_voltage; } __packed;
struct memory_info { diff --git a/src/soc/intel/apollolake/meminit_util_apl.c b/src/soc/intel/apollolake/meminit_util_apl.c index b272a99..cda7be5 100644 --- a/src/soc/intel/apollolake/meminit_util_apl.c +++ b/src/soc/intel/apollolake/meminit_util_apl.c @@ -80,6 +80,8 @@ if (!src_dimm->SizeInMb) continue;
+ u8 memProfNum = memory_info_hob->MemoryProfile; + /* Populate the DIMM information */ dimm_info_fill(dest_dimm, src_dimm->SizeInMb, @@ -91,7 +93,9 @@ dram_part_num, strlen(dram_part_num), NULL, /* SPD not available */ - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + memory_info_hob->VddVoltage[memProfNum], + memory_info_hob->EccSupport); index++; } } diff --git a/src/soc/intel/apollolake/meminit_util_glk.c b/src/soc/intel/apollolake/meminit_util_glk.c index 29dcd56..6940da6 100644 --- a/src/soc/intel/apollolake/meminit_util_glk.c +++ b/src/soc/intel/apollolake/meminit_util_glk.c @@ -86,6 +86,8 @@ if (!src_dimm->DimmCapacity) continue;
+ u8 memProfNum = memory_info_hob->MemoryProfile; + /* Populate the DIMM information */ dimm_info_fill(dest_dimm, src_dimm->DimmCapacity, @@ -97,7 +99,9 @@ dram_part_num, strlen(dram_part_num), src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + memory_info_hob->VddVoltage[memProfNum], + memory_info_hob->EccSupport); index++; } } diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 98d4c00..fa530a2 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -101,6 +101,8 @@ mainboard_get_dram_part_num(&dram_part_num, &dram_part_num_len);
+ u8 memProfNum = memory_info_hob->MemoryProfile; + /* Populate the DIMM information */ dimm_info_fill(dest_dimm, src_dimm->DimmCapacity, @@ -112,7 +114,9 @@ dram_part_num, dram_part_num_len, src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + memory_info_hob->VddVoltage[memProfNum], + memory_info_hob->EccSupport); index++; } } diff --git a/src/soc/intel/common/smbios.c b/src/soc/intel/common/smbios.c index d89e9d5..f96e7f3 100644 --- a/src/soc/intel/common/smbios.c +++ b/src/soc/intel/common/smbios.c @@ -22,7 +22,8 @@ void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type, u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id, const char *module_part_num, size_t module_part_number_size, - const u8 *module_serial_num, u16 data_width) + const u8 *module_serial_num, u16 data_width, u32 vdd_voltage, + bool ecc_support) { dimm->dimm_size = dimm_capacity; dimm->ddr_type = ddr_type; @@ -30,6 +31,8 @@ dimm->rank_per_dimm = rank_per_dimm; dimm->channel_num = channel_id; dimm->dimm_num = dimm_id; + dimm->vdd_voltage = vdd_voltage; + strncpy((char *)dimm->module_part_number, module_part_num, min(sizeof(dimm->module_part_number), @@ -57,4 +60,7 @@ printk(BIOS_NOTICE, "Incorrect DIMM Data width: %u\n", (unsigned int)data_width); } + + if (ecc_support) + dimm->bus_width |= 0x8; } diff --git a/src/soc/intel/common/smbios.h b/src/soc/intel/common/smbios.h index 5824f5d..12b8da0 100644 --- a/src/soc/intel/common/smbios.h +++ b/src/soc/intel/common/smbios.h @@ -26,6 +26,7 @@ void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type, u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id, const char *module_part_num, size_t module_part_number_size, - const u8 *module_serial_num, u16 data_width); + const u8 *module_serial_num, u16 data_width, u32 vdd_voltage, + bool ecc_support);
#endif /* _COMMON_SMBIOS_H_ */ diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c index 179d99c..a09641c 100644 --- a/src/soc/intel/icelake/romstage/romstage.c +++ b/src/soc/intel/icelake/romstage/romstage.c @@ -86,6 +86,8 @@ if (src_dimm->Status != DIMM_PRESENT) continue;
+ u8 memProfNum = memory_info_hob->MemoryProfile; + /* Populate the DIMM information */ dimm_info_fill(dest_dimm, src_dimm->DimmCapacity, @@ -97,7 +99,9 @@ (const char *)src_dimm->ModulePartNum, sizeof(src_dimm->ModulePartNum), src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + memory_info_hob->VddVoltage[memProfNum], + memory_info_hob->EccSupport); index++; } } diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 96937d6..12ad757 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -115,6 +115,7 @@ ddr_type = MEMORY_TYPE_UNKNOWN; break; } + u8 memProfNum = memory_info_hob->MemoryProfile;
/* Populate the DIMM information */ dimm_info_fill(dest_dimm, @@ -127,7 +128,9 @@ (const char *)src_dimm->ModulePartNum, sizeof(src_dimm->ModulePartNum), src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + memory_info_hob->VddVoltage[memProfNum], + memory_info_hob->EccSupport); index++; } }
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33031
to look at the new patch set (#2).
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
src/soc/intel/common/smbios: Add addtional infos to dimm_info
Added ECC Support and VDD Voltage to dimm_info struct. Now Bus Width and ECCSupport will be propagated correctly in SMBIOS Type 17 Entry.
Change-Id: Ic6f0d4b223f1490ec7aa71a6105603635b514021 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/arch/x86/smbios.c M src/include/memory_info.h M src/soc/intel/apollolake/meminit_util_apl.c M src/soc/intel/apollolake/meminit_util_glk.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/smbios.c M src/soc/intel/common/smbios.h M src/soc/intel/icelake/romstage/romstage.c M src/soc/intel/skylake/romstage/romstage_fsp20.c 9 files changed, 38 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/33031/2
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33031/2/src/include/memory_info.h File src/include/memory_info.h:
https://review.coreboot.org/#/c/33031/2/src/include/memory_info.h@90 PS2, Line 90: * Voltage Level missing unit (I guess mV). u16 should be sufficient
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2:
Patch Set 2:
(1 comment)
MEMORY_INFO_DATA_HOB returns a U32 - I guess the unit is mV but i"m not sure. I would rather not change the type to U16.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2:
@Intel: What unit does memory_info_hob->VddVoltage has? It's not documented.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2:
Patch Set 2:
@Intel: What unit does memory_info_hob->VddVoltage has? It's not documented.
i will review tomorrow
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2: Code-Review+1
verified on purism/librem_skl. voltages correctly reported in V (eg, 1.2 V).
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2:
Patch Set 2:
Patch Set 2:
@Intel: What unit does memory_info_hob->VddVoltage has? It's not documented.
i will review tomorrow
@Intel: What unit does memory_info_hob->VddVoltage has?
can you please look at https://github.com/coreboot/coreboot/blob/1470c7367b8fca24c86c8912aa65e969e6...
unit is in volts
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2:
Patch Set 2:
Patch Set 2:
Patch Set 2:
@Intel: What unit does memory_info_hob->VddVoltage has? It's not documented.
i will review tomorrow
@Intel: What unit does memory_info_hob->VddVoltage has?
can you please look at https://github.com/coreboot/coreboot/blob/1470c7367b8fca24c86c8912aa65e969e6...
unit is in volts
It says 1600 is 1.6V - so it is in mV right?
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2:
Patch Set 2:
Patch Set 2:
Patch Set 2:
Patch Set 2:
@Intel: What unit does memory_info_hob->VddVoltage has? It's not documented.
i will review tomorrow
@Intel: What unit does memory_info_hob->VddVoltage has?
can you please look at https://github.com/coreboot/coreboot/blob/1470c7367b8fca24c86c8912aa65e969e6...
unit is in volts
It says 1600 is 1.6V - so it is in mV right?
Do we need additional changes here?
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2: Code-Review+1
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33031/2/src/include/memory_info.h File src/include/memory_info.h:
https://review.coreboot.org/#/c/33031/2/src/include/memory_info.h@90 PS2, Line 90: * Voltage Level
missing unit (I guess mV). […]
Comment still applies. If the voltage exceeds 65V the board is dead or the reported value is wrong.
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33031/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33031/2//COMMIT_MSG@9 PS2, Line 9: Added Present tense:
Add
Hello Naresh Solanki, Pratikkumar V Prajapati, Subrata Banik, Matt DeVillier, Philipp Deppenwiese, Bora Guvendik, Lijian Zhao, build bot (Jenkins), Francois Toguo Fotso,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33031
to look at the new patch set (#3).
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
src/soc/intel/common/smbios: Add addtional infos to dimm_info
Added ECC Support and VDD Voltage to dimm_info struct. Now Bus Width and ECCSupport will be propagated correctly in SMBIOS Type 17 Entry.
Change-Id: Ic6f0d4b223f1490ec7aa71a6105603635b514021 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/arch/x86/smbios.c M src/include/memory_info.h M src/soc/intel/apollolake/meminit_util_apl.c M src/soc/intel/apollolake/meminit_util_glk.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/smbios.c M src/soc/intel/common/smbios.h M src/soc/intel/icelake/romstage/romstage.c M src/soc/intel/skylake/romstage/romstage_fsp20.c 9 files changed, 38 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/33031/3
Hello Naresh Solanki, Pratikkumar V Prajapati, Subrata Banik, Matt DeVillier, Philipp Deppenwiese, Bora Guvendik, Lijian Zhao, build bot (Jenkins), Francois Toguo Fotso,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33031
to look at the new patch set (#4).
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
src/soc/intel/common/smbios: Add addtional infos to dimm_info
Add ECC Support and VDD Voltage to dimm_info struct. Now Bus Width and ECCSupport will be propagated correctly in SMBIOS Type 17 Entry.
Change-Id: Ic6f0d4b223f1490ec7aa71a6105603635b514021 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/arch/x86/smbios.c M src/include/memory_info.h M src/soc/intel/apollolake/meminit_util_apl.c M src/soc/intel/apollolake/meminit_util_glk.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/smbios.c M src/soc/intel/common/smbios.h M src/soc/intel/icelake/romstage/romstage.c M src/soc/intel/skylake/romstage/romstage_fsp20.c 9 files changed, 38 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/33031/4
Hello Naresh Solanki, Pratikkumar V Prajapati, Subrata Banik, Matt DeVillier, Philipp Deppenwiese, Bora Guvendik, build bot (Jenkins), Lijian Zhao, Francois Toguo Fotso,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33031
to look at the new patch set (#5).
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
src/soc/intel/common/smbios: Add addtional infos to dimm_info
Added ECC Support and VDD Voltage to dimm_info struct. Now Bus Width and ECCSupport will be propagated correctly in SMBIOS Type 17 Entry.
Change-Id: Ic6f0d4b223f1490ec7aa71a6105603635b514021 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/arch/x86/smbios.c M src/include/memory_info.h M src/soc/intel/apollolake/meminit_util_apl.c M src/soc/intel/apollolake/meminit_util_glk.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/smbios.c M src/soc/intel/common/smbios.h M src/soc/intel/icelake/romstage/romstage.c M src/soc/intel/skylake/romstage/romstage_fsp20.c 9 files changed, 42 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/33031/5
Hello Naresh Solanki, Pratikkumar V Prajapati, Subrata Banik, Matt DeVillier, Philipp Deppenwiese, Bora Guvendik, build bot (Jenkins), Lijian Zhao, Francois Toguo Fotso,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33031
to look at the new patch set (#7).
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
src/soc/intel/common/smbios: Add addtional infos to dimm_info
Add ECC Support and VDD Voltage to dimm_info struct. Now Bus Width and ECCSupport will be propagated correctly in SMBIOS Type 17 Entry.
Change-Id: Ic6f0d4b223f1490ec7aa71a6105603635b514021 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/arch/x86/smbios.c M src/include/memory_info.h M src/soc/intel/apollolake/meminit_util_apl.c M src/soc/intel/apollolake/meminit_util_glk.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/smbios.c M src/soc/intel/common/smbios.h M src/soc/intel/icelake/romstage/romstage.c M src/soc/intel/skylake/romstage/romstage_fsp20.c 9 files changed, 42 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/33031/7
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
Patch Set 7: Code-Review+2
Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33031 )
Change subject: src/soc/intel/common/smbios: Add addtional infos to dimm_info ......................................................................
src/soc/intel/common/smbios: Add addtional infos to dimm_info
Add ECC Support and VDD Voltage to dimm_info struct. Now Bus Width and ECCSupport will be propagated correctly in SMBIOS Type 17 Entry.
Change-Id: Ic6f0d4b223f1490ec7aa71a6105603635b514021 Signed-off-by: Christian Walter christian.walter@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33031 Reviewed-by: Philipp Deppenwiese zaolin.daisuki@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/arch/x86/smbios.c M src/include/memory_info.h M src/soc/intel/apollolake/meminit_util_apl.c M src/soc/intel/apollolake/meminit_util_glk.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/smbios.c M src/soc/intel/common/smbios.h M src/soc/intel/icelake/romstage/romstage.c M src/soc/intel/skylake/romstage/romstage_fsp20.c 9 files changed, 42 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index bf627f2..54c2b09 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -372,6 +372,11 @@ dimm->module_part_number[DIMM_INFO_PART_NUMBER_SIZE - 1] = '\0'; smbios_fill_dimm_part_number((char *)dimm->module_part_number, t);
+ /* Voltage Levels */ + t->configured_voltage = dimm->vdd_voltage; + t->minimum_voltage = dimm->vdd_voltage; + t->maximum_voltage = dimm->vdd_voltage; + /* Synchronous = 1 */ t->type_detail = 0x0080; /* no handle for error information */ diff --git a/src/include/memory_info.h b/src/include/memory_info.h index 93c7b6b..ad3c177 100644 --- a/src/include/memory_info.h +++ b/src/include/memory_info.h @@ -86,6 +86,10 @@ * See the smbios.h smbios_memory_bus_width enum. */ uint8_t bus_width; + /* + * Voltage Level + */ + uint16_t vdd_voltage; } __packed;
struct memory_info { diff --git a/src/soc/intel/apollolake/meminit_util_apl.c b/src/soc/intel/apollolake/meminit_util_apl.c index b272a99..16d14d9 100644 --- a/src/soc/intel/apollolake/meminit_util_apl.c +++ b/src/soc/intel/apollolake/meminit_util_apl.c @@ -91,7 +91,9 @@ dram_part_num, strlen(dram_part_num), NULL, /* SPD not available */ - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + 0, + 0); index++; } } diff --git a/src/soc/intel/apollolake/meminit_util_glk.c b/src/soc/intel/apollolake/meminit_util_glk.c index 29dcd56..59e1330 100644 --- a/src/soc/intel/apollolake/meminit_util_glk.c +++ b/src/soc/intel/apollolake/meminit_util_glk.c @@ -97,7 +97,9 @@ dram_part_num, strlen(dram_part_num), src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + 0, + 0); index++; } } diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 98d4c00..fa530a2 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -101,6 +101,8 @@ mainboard_get_dram_part_num(&dram_part_num, &dram_part_num_len);
+ u8 memProfNum = memory_info_hob->MemoryProfile; + /* Populate the DIMM information */ dimm_info_fill(dest_dimm, src_dimm->DimmCapacity, @@ -112,7 +114,9 @@ dram_part_num, dram_part_num_len, src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + memory_info_hob->VddVoltage[memProfNum], + memory_info_hob->EccSupport); index++; } } diff --git a/src/soc/intel/common/smbios.c b/src/soc/intel/common/smbios.c index d89e9d5..e3ed3a2 100644 --- a/src/soc/intel/common/smbios.c +++ b/src/soc/intel/common/smbios.c @@ -22,7 +22,8 @@ void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type, u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id, const char *module_part_num, size_t module_part_number_size, - const u8 *module_serial_num, u16 data_width) + const u8 *module_serial_num, u16 data_width, u32 vdd_voltage, + bool ecc_support) { dimm->dimm_size = dimm_capacity; dimm->ddr_type = ddr_type; @@ -30,6 +31,12 @@ dimm->rank_per_dimm = rank_per_dimm; dimm->channel_num = channel_id; dimm->dimm_num = dimm_id; + if (vdd_voltage > 0xFFFF) { + dimm->vdd_voltage = 0xFFFF; + } else { + dimm->vdd_voltage = vdd_voltage; + } + strncpy((char *)dimm->module_part_number, module_part_num, min(sizeof(dimm->module_part_number), @@ -57,4 +64,7 @@ printk(BIOS_NOTICE, "Incorrect DIMM Data width: %u\n", (unsigned int)data_width); } + + if (ecc_support) + dimm->bus_width |= 0x8; } diff --git a/src/soc/intel/common/smbios.h b/src/soc/intel/common/smbios.h index 5824f5d..12b8da0 100644 --- a/src/soc/intel/common/smbios.h +++ b/src/soc/intel/common/smbios.h @@ -26,6 +26,7 @@ void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type, u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id, const char *module_part_num, size_t module_part_number_size, - const u8 *module_serial_num, u16 data_width); + const u8 *module_serial_num, u16 data_width, u32 vdd_voltage, + bool ecc_support);
#endif /* _COMMON_SMBIOS_H_ */ diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c index 179d99c..a09641c 100644 --- a/src/soc/intel/icelake/romstage/romstage.c +++ b/src/soc/intel/icelake/romstage/romstage.c @@ -86,6 +86,8 @@ if (src_dimm->Status != DIMM_PRESENT) continue;
+ u8 memProfNum = memory_info_hob->MemoryProfile; + /* Populate the DIMM information */ dimm_info_fill(dest_dimm, src_dimm->DimmCapacity, @@ -97,7 +99,9 @@ (const char *)src_dimm->ModulePartNum, sizeof(src_dimm->ModulePartNum), src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + memory_info_hob->VddVoltage[memProfNum], + memory_info_hob->EccSupport); index++; } } diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 04c369b..2819c6f 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -114,6 +114,7 @@ ddr_type = MEMORY_TYPE_UNKNOWN; break; } + u8 memProfNum = memory_info_hob->MemoryProfile;
/* Populate the DIMM information */ dimm_info_fill(dest_dimm, @@ -126,7 +127,9 @@ (const char *)src_dimm->ModulePartNum, sizeof(src_dimm->ModulePartNum), src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + memory_info_hob->VddVoltage[memProfNum], + memory_info_hob->EccSupport); index++; } }
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Paul Menzel (Code Review)
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Subrata Banik (Code Review)