Change in coreboot[master]: soc/intel/cmn/pch/lockdown: Implement LPC lock down configuration

[Angel Pons (Code Review)]

Attention is currently required from: Marc Jones, Subrata Banik, Tim Wawrzynczak, Arthur Heymans, Eric Lai, Lean Sheng Tan.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63630 )

Change subject: soc/intel/cmn/pch/lockdown: Implement LPC lock down configuration
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Patch Set 6: Code-Review+1

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/63630/comment/a0b89a60_57d37e61 
PS4, Line 14: configuration register offset 0xDC bits BILD and LE are set.
> @Angel, any more thoughts ?

OK, if there's no hang it should be OK.