Change in coreboot[master]: soc/amd/cezanne: Add PCI IRQ Router definitions - coreboot-gerrit

10 Feb 2021


      Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50451 )
Change subject: soc/amd/cezanne: Add PCI IRQ Router definitions
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Patch Set 1:
(1 comment)
File src/soc/amd/cezanne/include/soc/amd_pci_int_defs.h:
https://review.coreboot.org/c/coreboot/+/50451/comment/659c2963_df4372e8 
PS1, Line 61: #define PIRQ_UART2	0x78	/* UART2 */
            : #define PIRQ_UART3	0x79	/* UART3 */
...
without having verified this, this smells wrong. […]
I'm using 56569-A1 Rev 3.00 - Nov 18, 2020
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic7e637f234d3af426959a9bbd82a0dcf25bb3c8e
Gerrit-Change-Number: 50451
Gerrit-PatchSet: 1
Gerrit-Owner: Raul Rangel rrangel@chromium.org
Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de
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